forked from Minki/linux
0ab75ae81d
Several files refer to an old address for the Free Software Foundation in the file header comment. Resolve by replacing the address with the URL <http://www.gnu.org/licenses/> so that we do not have to keep updating the header comments anytime the address changes. CC: Santosh Raspatur <santosh@chelsio.com> CC: Dimitris Michailidis <dm@chelsio.com> CC: Michael Chan <mchan@broadcom.com> CC: Santiago Leon <santil@linux.vnet.ibm.com> CC: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> CC: Olof Johansson <olof@lixom.net> CC: Manish Chopra <manish.chopra@qlogic.com> CC: Sony Chacko <sony.chacko@qlogic.com> CC: Rajesh Borundia <rajesh.borundia@qlogic.com> CC: Nicolas Pitre <nico@fluxnic.net> CC: Steve Glendinning <steve.glendinning@shawell.net> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
38 lines
1.5 KiB
C
38 lines
1.5 KiB
C
/*
|
|
* Copyright (C) 1999 - 2010 Intel Corporation.
|
|
* Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
|
|
*
|
|
* This code was derived from the Intel e1000e Linux driver.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; version 2 of the License.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
#ifndef _PCH_GBE_PHY_H_
|
|
#define _PCH_GBE_PHY_H_
|
|
|
|
#define PCH_GBE_PHY_REGS_LEN 32
|
|
#define PCH_GBE_PHY_RESET_DELAY_US 10
|
|
#define PCH_GBE_MAC_IFOP_RGMII
|
|
|
|
s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw);
|
|
s32 pch_gbe_phy_read_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 *data);
|
|
s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data);
|
|
void pch_gbe_phy_sw_reset(struct pch_gbe_hw *hw);
|
|
void pch_gbe_phy_hw_reset(struct pch_gbe_hw *hw);
|
|
void pch_gbe_phy_power_up(struct pch_gbe_hw *hw);
|
|
void pch_gbe_phy_power_down(struct pch_gbe_hw *hw);
|
|
void pch_gbe_phy_set_rgmii(struct pch_gbe_hw *hw);
|
|
void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw);
|
|
int pch_gbe_phy_disable_hibernate(struct pch_gbe_hw *hw);
|
|
|
|
#endif /* _PCH_GBE_PHY_H_ */
|