linux/arch/riscv
Linus Torvalds 69dac8e431 RISC-V Patches for the 5.20 Merge Window, Part 2
There's still a handful of new features in here, but there are a lot of
 fixes/cleanups as well:
 
 * Support for the Zicbom for explicit cache-block management, along with
   the necessary bits to make the non-standard cache management ops on
   the Allwinner D1 function.
 * Support for the Zihintpause extension, which codifies a go-slow
   instruction used for cpu_relax().
 * Support for the Sstc extension for supervisor-mode timer/counter
   management.
 * Many device tree fixes and cleanups, including a large set for the
   Canaan device trees.
 * A handful of fixes and cleanups for the PMU driver.
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Merge tag 'riscv-for-linus-5.20-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull more RISC-V updates from Palmer Dabbelt:
 "There's still a handful of new features in here, but there are a lot
  of fixes/cleanups as well:

   - Support for the Zicbom extension for explicit cache-block
     management, along with the necessary bits to make the non-standard
     cache management ops on the Allwinner D1 function

   - Support for the Zihintpause extension, which codifies a go-slow
     instruction used for cpu_relax()

   - Support for the Sstc extension for supervisor-mode timer/counter
     management

   - Many device tree fixes and cleanups, including a large set for the
     Canaan device trees

   - A handful of fixes and cleanups for the PMU driver"

* tag 'riscv-for-linus-5.20-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (43 commits)
  dt-bindings: gpio: sifive: add gpio-line-names
  wireguard: selftests: set CONFIG_NONPORTABLE on riscv32
  RISC-V: KVM: Support sstc extension
  RISC-V: Improve SBI definitions
  RISC-V: Move counter info definition to sbi header file
  RISC-V: Fix SBI PMU calls for RV32
  RISC-V: Update user page mapping only once during start
  RISC-V: Fix counter restart during overflow for RV32
  RISC-V: Prefer sstc extension if available
  RISC-V: Enable sstc extension parsing from DT
  RISC-V: Add SSTC extension CSR details
  riscv:uprobe fix SR_SPIE set/clear handling
  dt-bindings: riscv: fix SiFive l2-cache's cache-sets
  riscv: ensure cpu_ops_sbi is declared
  RISC-V: cpu_ops_spinwait.c should include head.h
  RISC-V: Declare cpu_ops_spinwait in <asm/cpu_ops.h>
  riscv: dts: starfive: correct number of external interrupts
  riscv: dts: sifive unmatched: Add PWM controlled LEDs
  riscv/purgatory: Omit use of bin2c
  riscv/purgatory: hard-code obj-y in Makefile
  ...
2022-08-12 18:39:43 -07:00
..
boot riscv: dts: starfive: correct number of external interrupts 2022-08-11 11:40:37 -07:00
configs riscv: enable Docker requirements in defconfig 2022-07-22 13:43:28 -07:00
errata riscv: implement Zicbom-based CMO instructions + the t-head variant 2022-08-10 20:49:32 -07:00
include RISC-V: KVM: Support sstc extension 2022-08-12 07:43:57 -07:00
kernel RISC-V Patches for the 5.20 Merge Window, Part 2 2022-08-12 18:39:43 -07:00
kvm RISC-V: KVM: Support sstc extension 2022-08-12 07:43:57 -07:00
lib riscv: lib: uaccess: fix CSR_STATUS SR_SUM bit 2022-08-10 14:06:31 -07:00
mm RISC-V: fixups to work with crash tool 2022-08-11 09:04:01 -07:00
net bpf, riscv: Support riscv jit to provide bpf_line_info 2022-06-02 16:26:01 -07:00
purgatory riscv/purgatory: Omit use of bin2c 2022-08-11 09:32:34 -07:00
Kbuild riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild 2022-06-01 22:26:32 -07:00
Kconfig riscv/purgatory: Omit use of bin2c 2022-08-11 09:32:34 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.erratas riscv: implement Zicbom-based CMO instructions + the t-head variant 2022-08-10 20:49:32 -07:00
Kconfig.socs riscv: Kconfig: Style cleanups 2022-06-30 19:26:16 -07:00
Makefile arch/riscv: add Zihintpause support 2022-08-11 08:03:49 -07:00