e425361408
This patch adds dts support for NAND flash controller of Hisilicon Soc Hip04. Changes in v3: - Change E-mail address in signed-off-by to "wangzhou1@hisilicon.com" Changes in v2: - Base on v3.19-rc1 - Use nand-ecc-strength, nand-ecc-step-size to replace hisi,nand-ecc-bits Changes in v1: - Move partition and other board related information into board dts file: hip04-d01.dts Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
60 lines
1.2 KiB
Plaintext
60 lines
1.2 KiB
Plaintext
/*
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* Copyright (C) 2013-2014 Linaro Ltd.
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* Author: Haojian Zhuang <haojian.zhuang@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "hip04.dtsi"
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/ {
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/* memory bus is 64-bit */
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#address-cells = <2>;
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#size-cells = <2>;
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model = "Hisilicon D01 Development Board";
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compatible = "hisilicon,hip04-d01";
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memory@00000000,10000000 {
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device_type = "memory";
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reg = <0x00000000 0x10000000 0x00000000 0xc0000000>,
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<0x00000004 0xc0000000 0x00000003 0x40000000>;
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};
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soc {
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uart0: uart@4007000 {
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status = "ok";
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};
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nand: nand@4020000 {
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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nand-ecc-strength = <16>;
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nand-ecc-step-size = <1024>;
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partition@0 {
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label = "nand_text";
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reg = <0x00000000 0x00400000>;
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};
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partition@00400000 {
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label = "nand_monitor";
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reg = <0x00400000 0x00400000>;
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};
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partition@00800000 {
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label = "nand_kernel";
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reg = <0x00800000 0x00800000>;
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};
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partition@01000000 {
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label = "nand_fs";
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reg = <0x01000000 0x1f000000>;
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};
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};
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};
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};
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