forked from Minki/linux
08344f3b43
This is a collection of a few late fixes and other misc. stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAV0Sse2CrR//JCVInAQJoOg//VQwAUxayKGfYVzhJjhHdYbVA9kWYczHb wizFbF51XPylQzfGgHxEZJgdO3y2Ks54J7xaCK7oSUPEBT0rHsLQunHhq0aVQpew 1c06vEysYMkRclG7C0zN7i4gwdig+L4r6kUguTvb+nyJS3RISg0LaSoANVU65dQ5 +g4DLRrX1QlZPBXR8Fc/S1gTFXU+dO1S0oJFnK9ZZTgmsGg4GA0qC60hdsv+WeSv uzS4FJoxSy9MzoAFqmnWIa4jBV9I1Rg5vi7dfoBbTW1XOAMpq+GVLLU+Lvso0Jqw xWjBSmPl6l/cZ7BhpzWq8knKOsEezh5LLrVRXViVCGfTIFdlObxyHzeKcJp25V1p mL98MBXobn9Rly9hJxyzpeNWITZ6qJYR+IQy3Lsuk5KrdZG2f4uTErtoqmYRI3Pn vuXoi13NUeoCrHZJZ+fNUGwx5a5/hgUQXP5u+98uucQSqIVxe0cGnQVnFm84X81r Sj/dXxFlFBZfqfE8rf1cFd+YEbKtpF13vEURAQWrnEzBmJSTu7Cp8qdA5hX5CeK4 DW9bsu5hkWwnzoC2Ox/ZQVms4aI3q8s2xuu28GEJJdCE2IUiSnag/5vhGBzd4dTm 9R69RhE9y4EOhw+0z1O0LfoKoo6YyUQa+OUNVIwEfFjcCdZiMQIdZWi2PLv4jeAR jBBbpcWtHLo= =I0Be -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late DT updates from Arnd Bergmann: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3 ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3 ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk ARM: dts: exynos: Add DMC bus node for Exynos3250 ARM: tegra: Enable XUSB on Nyan ARM: tegra: Enable XUSB on Jetson TK1 ARM: tegra: Enable XUSB on Venice2 ARM: tegra: Add Tegra124 XUSB controller ARM: tegra: Move Tegra124 to the new XUSB pad controller binding ARM: dts: r8a7794: Use SYSC "always-on" PM Domain ARM: dts: r8a7793: Use SYSC "always-on" PM Domain ...
555 lines
11 KiB
Plaintext
555 lines
11 KiB
Plaintext
/*
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* Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
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* device tree source
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/sound/samsung-i2s.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/clock/maxim,max77686.h>
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#include "exynos4412.dtsi"
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#include "exynos4412-ppmu-common.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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chosen {
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stdout-path = &serial_1;
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};
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firmware@0204F000 {
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compatible = "samsung,secure-firmware";
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reg = <0x0204F000 0x1000>;
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};
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&gpio_power_key>;
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power_key {
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interrupt-parent = <&gpx1>;
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interrupts = <3 0>;
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gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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label = "power key";
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debounce-interval = <10>;
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wakeup-source;
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};
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};
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sound: sound {
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compatible = "simple-audio-card";
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assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
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<&clock_audss EXYNOS_MOUT_I2S>,
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<&clock_audss EXYNOS_DOUT_SRP>,
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<&clock_audss EXYNOS_DOUT_AUD_BUS>;
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assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
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<&clock_audss EXYNOS_MOUT_AUDSS>;
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assigned-clock-rates = <0>,
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<0>,
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<192000000>,
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<19200000>;
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&link0_codec>;
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simple-audio-card,frame-master = <&link0_codec>;
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simple-audio-card,cpu {
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sound-dai = <&i2s0 0>;
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system-clock-frequency = <19200000>;
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};
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link0_codec: simple-audio-card,codec {
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sound-dai = <&max98090>;
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clocks = <&i2s0 CLK_I2S_CDCLK>;
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};
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};
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emmc_pwrseq: pwrseq {
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pinctrl-0 = <&sd1_cd>;
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pinctrl-names = "default";
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
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};
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camera {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <>;
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};
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fixed-rate-clocks {
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xxti {
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compatible = "samsung,clock-xxti";
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clock-frequency = <0>;
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};
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xusbxti {
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compatible = "samsung,clock-xusbxti";
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clock-frequency = <24000000>;
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};
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};
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thermal-zones {
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cpu_thermal: cpu-thermal {
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cooling-maps {
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map0 {
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/* Corresponds to 800MHz at freq_table */
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cooling-device = <&cpu0 7 7>;
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};
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map1 {
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/* Corresponds to 200MHz at freq_table */
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cooling-device = <&cpu0 13 13>;
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};
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};
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};
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};
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};
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&bus_dmc {
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devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
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vdd-supply = <&buck1_reg>;
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status = "okay";
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};
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&bus_acp {
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devfreq = <&bus_dmc>;
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status = "okay";
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};
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&bus_c2c {
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devfreq = <&bus_dmc>;
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status = "okay";
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};
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&bus_leftbus {
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devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
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vdd-supply = <&buck3_reg>;
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status = "okay";
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};
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&bus_rightbus {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&bus_display {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&bus_fsys {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&bus_peri {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&bus_mfc {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&cpu0 {
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cpu0-supply = <&buck2_reg>;
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};
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/* RSTN signal for eMMC */
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&sd1_cd {
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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&pinctrl_1 {
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gpio_power_key: power_key {
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samsung,pins = "gpx1-3";
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samsung,pin-pud = <0>;
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};
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max77686_irq: max77686-irq {
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samsung,pins = "gpx3-2";
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samsung,pin-function = <0>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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hdmi_hpd: hdmi-hpd {
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samsung,pins = "gpx3-7";
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samsung,pin-pud = <1>;
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};
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};
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&ehci {
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status = "okay";
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};
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&exynos_usbphy {
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status = "okay";
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};
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&fimc_0 {
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status = "okay";
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assigned-clocks = <&clock CLK_MOUT_FIMC0>,
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<&clock CLK_SCLK_FIMC0>;
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assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
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assigned-clock-rates = <0>, <176000000>;
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};
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&fimc_1 {
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status = "okay";
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assigned-clocks = <&clock CLK_MOUT_FIMC1>,
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<&clock CLK_SCLK_FIMC1>;
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assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
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assigned-clock-rates = <0>, <176000000>;
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};
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&fimc_2 {
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status = "okay";
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assigned-clocks = <&clock CLK_MOUT_FIMC2>,
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<&clock CLK_SCLK_FIMC2>;
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assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
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assigned-clock-rates = <0>, <176000000>;
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};
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&fimc_3 {
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status = "okay";
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assigned-clocks = <&clock CLK_MOUT_FIMC3>,
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<&clock CLK_SCLK_FIMC3>;
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assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
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assigned-clock-rates = <0>, <176000000>;
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};
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&hdmi {
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hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_hpd>;
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vdd-supply = <&ldo8_reg>;
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vdd_osc-supply = <&ldo10_reg>;
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vdd_pll-supply = <&ldo8_reg>;
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ddc = <&i2c_2>;
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status = "okay";
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};
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&hdmicec {
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status = "okay";
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};
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&hsotg {
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dr_mode = "peripheral";
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status = "okay";
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vusb_d-supply = <&ldo15_reg>;
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vusb_a-supply = <&ldo12_reg>;
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};
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&i2c_0 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <400000>;
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status = "okay";
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usb3503: usb3503@08 {
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compatible = "smsc,usb3503";
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reg = <0x08>;
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intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
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connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
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initial-mode = <1>;
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};
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max77686: pmic@09 {
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compatible = "maxim,max77686";
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interrupt-parent = <&gpx3>;
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interrupts = <2 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&max77686_irq>;
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reg = <0x09>;
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#clock-cells = <1>;
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voltage-regulators {
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ldo1_reg: LDO1 {
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regulator-name = "VDD_ALIVE_1.0V";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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ldo2_reg: LDO2 {
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regulator-name = "VDDQ_M1_2_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo3_reg: LDO3 {
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regulator-name = "VDDQ_EXT_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo4_reg: LDO4 {
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regulator-name = "VDDQ_MMC2_2.8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo5_reg: LDO5 {
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regulator-name = "VDDQ_MMC1_3_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo6_reg: LDO6 {
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regulator-name = "VDD10_MPLL_1.0V";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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ldo7_reg: LDO7 {
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regulator-name = "VDD10_XPLL_1.0V";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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ldo8_reg: LDO8 {
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regulator-name = "VDD10_HDMI_1.0V";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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};
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ldo10_reg: LDO10 {
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regulator-name = "VDDQ_MIPIHSI_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo11_reg: LDO11 {
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regulator-name = "VDD18_ABB1_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo12_reg: LDO12 {
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regulator-name = "VDD33_USB_3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo13_reg: LDO13 {
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regulator-name = "VDDQ_C2C_W_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo14_reg: LDO14 {
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regulator-name = "VDD18_ABB0_2_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo15_reg: LDO15 {
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regulator-name = "VDD10_HSIC_1.0V";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo16_reg: LDO16 {
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regulator-name = "VDD18_HSIC_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo20_reg: LDO20 {
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regulator-name = "LDO20_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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};
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ldo21_reg: LDO21 {
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regulator-name = "LDO21_3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo25_reg: LDO25 {
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regulator-name = "VDDQ_LCD_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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buck1_reg: BUCK1 {
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regulator-name = "vdd_mif";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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regulator-boot-on;
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};
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buck2_reg: BUCK2 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-boot-on;
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};
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buck3_reg: BUCK3 {
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regulator-name = "vdd_int";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1050000>;
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regulator-always-on;
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regulator-boot-on;
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};
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buck4_reg: BUCK4 {
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regulator-name = "vdd_g3d";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1100000>;
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regulator-microvolt-offset = <50000>;
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};
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|
buck5_reg: BUCK5 {
|
|
regulator-name = "VDDQ_CKEM1_2_1.2V";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
buck6_reg: BUCK6 {
|
|
regulator-name = "BUCK6_1.35V";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
buck7_reg: BUCK7 {
|
|
regulator-name = "BUCK7_2.0V";
|
|
regulator-min-microvolt = <2000000>;
|
|
regulator-max-microvolt = <2000000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck8_reg: BUCK8 {
|
|
regulator-name = "BUCK8_2.8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c_1 {
|
|
status = "okay";
|
|
max98090: max98090@10 {
|
|
compatible = "maxim,max98090";
|
|
reg = <0x10>;
|
|
interrupt-parent = <&gpx0>;
|
|
interrupts = <0 0>;
|
|
clocks = <&i2s0 CLK_I2S_CDCLK>;
|
|
clock-names = "mclk";
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
};
|
|
|
|
&i2c_2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c_8 {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2s0 {
|
|
pinctrl-0 = <&i2s0_bus>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
clocks = <&clock_audss EXYNOS_I2S_BUS>,
|
|
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
|
|
<&clock_audss EXYNOS_SCLK_I2S>;
|
|
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
|
|
};
|
|
|
|
&mixer {
|
|
status = "okay";
|
|
};
|
|
|
|
&mshc_0 {
|
|
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
|
|
pinctrl-names = "default";
|
|
vmmc-supply = <&ldo20_reg &buck8_reg>;
|
|
mmc-pwrseq = <&emmc_pwrseq>;
|
|
status = "okay";
|
|
|
|
num-slots = <1>;
|
|
broken-cd;
|
|
card-detect-delay = <200>;
|
|
samsung,dw-mshc-ciu-div = <3>;
|
|
samsung,dw-mshc-sdr-timing = <2 3>;
|
|
samsung,dw-mshc-ddr-timing = <1 2>;
|
|
bus-width = <8>;
|
|
cap-mmc-highspeed;
|
|
};
|
|
|
|
&rtc {
|
|
status = "okay";
|
|
clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
|
|
clock-names = "rtc", "rtc_src";
|
|
};
|
|
|
|
&sdhci_2 {
|
|
bus-width = <4>;
|
|
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
|
|
pinctrl-names = "default";
|
|
vmmc-supply = <&ldo4_reg &ldo21_reg>;
|
|
cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
|
|
cd-inverted;
|
|
status = "okay";
|
|
};
|
|
|
|
&serial_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&serial_1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&tmu {
|
|
vtmu-supply = <&ldo10_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&watchdog {
|
|
status = "okay";
|
|
};
|