Some of i.MX8 processors (e.g i.MX8QM, i.MX8QXP) contain
the Tensilica HiFi4 DSP for advanced pre- and post-audio
processing.
The communication between Host CPU and DSP firmware is
taking place using a shared memory area for message passing
and a dedicated Messaging Unit for notifications.
DSP IPC protocol offers a doorbell interface using
imx-mailbox API.
We use 4 MU channels (2 x TXDB, 2 x RXDB) to implement a
request-reply protocol.
Connection 0 (txdb0, rxdb0):
- Host writes messasge to shared memory [SHMEM]
- Host sends a request [MU]
- DSP handles request [SHMEM]
- DSP sends reply [MU]
Connection 1 (txdb1, rxdb1):
- DSP writes a message to shared memory [SHMEM]
- DSP sends a request [MU]
- Host handles request [SHMEM]
- Host sends reply [MU]
The protocol interface will be used by a Host client to
communicate with the DSP. First client will be the i.MX8
part from Sound Open Firmware infrastructure.
The protocol offers the following interface:
On Tx:
- imx_dsp_ring_doorbell, will be called to notify the DSP
that it needs to handle a request.
On Rx:
- clients need to provide two callbacks:
.handle_reply
.handle_request
- the callbacks will be used by the protocol on
notification arrival from DSP.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
30 lines
948 B
Plaintext
30 lines
948 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
|
|
config IMX_DSP
|
|
bool "IMX DSP Protocol driver"
|
|
depends on IMX_MBOX
|
|
help
|
|
This enables DSP IPC protocol between host AP (Linux)
|
|
and the firmware running on DSP.
|
|
DSP exists on some i.MX8 processors (e.g i.MX8QM, i.MX8QXP).
|
|
|
|
It acts like a doorbell. Client might use shared memory to
|
|
exchange information with DSP side.
|
|
|
|
config IMX_SCU
|
|
bool "IMX SCU Protocol driver"
|
|
depends on IMX_MBOX
|
|
help
|
|
The System Controller Firmware (SCFW) is a low-level system function
|
|
which runs on a dedicated Cortex-M core to provide power, clock, and
|
|
resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
|
|
(QM, QP), and i.MX8QX (QXP, DX).
|
|
|
|
This driver manages the IPC interface between host CPU and the
|
|
SCU firmware running on M4.
|
|
|
|
config IMX_SCU_PD
|
|
bool "IMX SCU Power Domain driver"
|
|
depends on IMX_SCU
|
|
help
|
|
The System Controller Firmware (SCFW) based power domain driver.
|