forked from Minki/linux
8dd49165ef
Some flashes can only be properly accessed when the ECC mode is
specified, so a way to describe such mode is required.
Together, the ECC strength and step size define the correction capability,
so that we say we will correct "{strength} bit errors per {size} bytes".
The interpretation of these parameters is implementation-defined, but they
often have ramifications on the formation, interpretation, and placement of
correction metadata on the flash. Not all implementations must support all
possible combinations. Implementations are encouraged to further define the
value(s) they support.
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
22 lines
924 B
Plaintext
22 lines
924 B
Plaintext
* MTD generic binding
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- nand-ecc-mode : String, operation mode of the NAND ecc mode.
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Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
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"soft_bch".
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- nand-bus-width : 8 or 16 bus width if not present 8
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- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
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- nand-ecc-strength: integer representing the number of bits to correct
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per ECC step.
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- nand-ecc-step-size: integer representing the number of data bytes
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that are covered by a single ECC step.
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The ECC strength and ECC step size properties define the correction capability
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of a controller. Together, they say a controller can correct "{strength} bit
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errors per {size} bytes".
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The interpretation of these parameters is implementation-defined, so not all
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implementations must support all possible combinations. However, implementations
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are encouraged to further specify the value(s) they support.
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