John David Anglin 38860b2c8b parisc: Flush kernel data mapping in set_pte_at() when installing pte for user page ... For years, there have been random segmentation faults in userspace on SMP PA-RISC machines. It occurred to me that this might be a problem in set_pte_at(). MIPS and some other architectures do cache flushes when installing PTEs with the present bit set. Here I have adapted the code in update_mmu_cache() to flush the kernel mapping when the kernel flush is deferred, or when the kernel mapping may alias with the user mapping. This simplifies calls to update_mmu_cache(). I also changed the barrier in set_pte() from a compiler barrier to a full memory barrier. I know this change is not sufficient to fix the problem. It might not be needed. I have had a few days of operation with 5.14.16 to 5.15.1 and haven't seen any random segmentation faults on rp3440 or c8000 so far. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@kernel.org # 5.12+		2021-11-13 22:10:56 +01:00
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asm	parisc: Flush kernel data mapping in set_pte_at() when installing pte for user page	2021-11-13 22:10:56 +01:00
uapi/asm	Core:	2021-11-02 06:20:58 -07:00