forked from Minki/linux
d5e5deddf6
* nouveau/for-airlied: drm/nouveau: add module option to disable TV detection drm/nouveau: Never evict VRAM buffers to system. drm/nv50: fix connector table parsing for some cards drm/nv50: add a memory barrier to pushbuf submission drm/nouveau: print a message very early during suspend drm/nv04-nv40: Fix up the programmed horizontal sync pulse delay. drm/nouveau: Gigabyte NX85T connector table lies, it has DVI-I not HDMI drm/nouveau: add option to allow override of dcb connector table types drm/nv50: Improve PGRAPH interrupt handling. drm/nv50: Make ctxprog wait until interrupt handler is done. drm/nouveau: Fix fbcon corruption with font width not divisible by 8 drm/nv50: Remove redundant/incorrect ctxvals initialisation.
435 lines
12 KiB
C
435 lines
12 KiB
C
/*
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* Copyright 2005 Stephane Marchesin.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <linux/console.h>
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#include "drmP.h"
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#include "drm.h"
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#include "drm_crtc_helper.h"
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#include "nouveau_drv.h"
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#include "nouveau_hw.h"
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#include "nouveau_fb.h"
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#include "nouveau_fbcon.h"
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#include "nv50_display.h"
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#include "drm_pciids.h"
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MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
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int nouveau_ctxfw = 0;
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module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
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MODULE_PARM_DESC(noagp, "Disable AGP");
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int nouveau_noagp;
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module_param_named(noagp, nouveau_noagp, int, 0400);
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MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
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static int nouveau_modeset = -1; /* kms */
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module_param_named(modeset, nouveau_modeset, int, 0400);
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MODULE_PARM_DESC(vbios, "Override default VBIOS location");
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char *nouveau_vbios;
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module_param_named(vbios, nouveau_vbios, charp, 0400);
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MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
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int nouveau_vram_pushbuf;
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module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
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MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
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int nouveau_vram_notify = 1;
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module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
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MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
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int nouveau_duallink = 1;
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module_param_named(duallink, nouveau_duallink, int, 0400);
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MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
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int nouveau_uscript_lvds = -1;
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module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
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MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
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int nouveau_uscript_tmds = -1;
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module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
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MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
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int nouveau_ignorelid = 0;
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module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
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MODULE_PARM_DESC(noaccel, "Disable all acceleration");
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int nouveau_noaccel = 0;
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module_param_named(noaccel, nouveau_noaccel, int, 0400);
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MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
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int nouveau_nofbaccel = 0;
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module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
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MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
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int nouveau_override_conntype = 0;
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module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
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MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
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int nouveau_tv_disable = 0;
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module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
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MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
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"\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
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"\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
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"\t\tDefault: PAL\n"
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"\t\t*NOTE* Ignored for cards with external TV encoders.");
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char *nouveau_tv_norm;
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module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
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MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
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"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
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"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
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"\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
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int nouveau_reg_debug;
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module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
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int nouveau_fbpercrtc;
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#if 0
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module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
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#endif
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static struct pci_device_id pciidlist[] = {
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{
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
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.class = PCI_BASE_CLASS_DISPLAY << 16,
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.class_mask = 0xff << 16,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
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.class = PCI_BASE_CLASS_DISPLAY << 16,
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.class_mask = 0xff << 16,
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},
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{}
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};
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MODULE_DEVICE_TABLE(pci, pciidlist);
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static struct drm_driver driver;
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static int __devinit
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nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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return drm_get_dev(pdev, ent, &driver);
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}
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static void
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nouveau_pci_remove(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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drm_put_dev(dev);
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}
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int
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nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
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struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
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struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
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struct nouveau_channel *chan;
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struct drm_crtc *crtc;
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uint32_t fbdev_flags;
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int ret, i;
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if (!drm_core_check_feature(dev, DRIVER_MODESET))
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return -ENODEV;
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if (pm_state.event == PM_EVENT_PRETHAW)
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return 0;
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NV_INFO(dev, "Disabling fbcon acceleration...\n");
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fbdev_flags = dev_priv->fbdev_info->flags;
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dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
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NV_INFO(dev, "Unpinning framebuffer(s)...\n");
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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struct nouveau_framebuffer *nouveau_fb;
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nouveau_fb = nouveau_framebuffer(crtc->fb);
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if (!nouveau_fb || !nouveau_fb->nvbo)
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continue;
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nouveau_bo_unpin(nouveau_fb->nvbo);
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}
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NV_INFO(dev, "Evicting buffers...\n");
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ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
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NV_INFO(dev, "Idling channels...\n");
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for (i = 0; i < pfifo->channels; i++) {
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struct nouveau_fence *fence = NULL;
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chan = dev_priv->fifos[i];
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if (!chan || (dev_priv->card_type >= NV_50 &&
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chan == dev_priv->fifos[0]))
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continue;
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ret = nouveau_fence_new(chan, &fence, true);
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if (ret == 0) {
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ret = nouveau_fence_wait(fence, NULL, false, false);
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nouveau_fence_unref((void *)&fence);
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}
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if (ret) {
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NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
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chan->id);
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}
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}
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pgraph->fifo_access(dev, false);
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nouveau_wait_for_idle(dev);
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pfifo->reassign(dev, false);
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pfifo->disable(dev);
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pfifo->unload_context(dev);
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pgraph->unload_context(dev);
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NV_INFO(dev, "Suspending GPU objects...\n");
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ret = nouveau_gpuobj_suspend(dev);
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if (ret) {
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NV_ERROR(dev, "... failed: %d\n", ret);
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goto out_abort;
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}
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ret = pinstmem->suspend(dev);
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if (ret) {
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NV_ERROR(dev, "... failed: %d\n", ret);
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nouveau_gpuobj_suspend_cleanup(dev);
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goto out_abort;
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}
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NV_INFO(dev, "And we're gone!\n");
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pci_save_state(pdev);
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if (pm_state.event == PM_EVENT_SUSPEND) {
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pci_disable_device(pdev);
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pci_set_power_state(pdev, PCI_D3hot);
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}
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acquire_console_sem();
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fb_set_suspend(dev_priv->fbdev_info, 1);
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release_console_sem();
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dev_priv->fbdev_info->flags = fbdev_flags;
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return 0;
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out_abort:
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NV_INFO(dev, "Re-enabling acceleration..\n");
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pfifo->enable(dev);
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pfifo->reassign(dev, true);
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pgraph->fifo_access(dev, true);
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return ret;
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}
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int
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nouveau_pci_resume(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_engine *engine = &dev_priv->engine;
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struct drm_crtc *crtc;
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uint32_t fbdev_flags;
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int ret, i;
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if (!drm_core_check_feature(dev, DRIVER_MODESET))
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return -ENODEV;
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fbdev_flags = dev_priv->fbdev_info->flags;
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dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
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NV_INFO(dev, "We're back, enabling device...\n");
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pci_set_power_state(pdev, PCI_D0);
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pci_restore_state(pdev);
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if (pci_enable_device(pdev))
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return -1;
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pci_set_master(dev->pdev);
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NV_INFO(dev, "POSTing device...\n");
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ret = nouveau_run_vbios_init(dev);
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if (ret)
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return ret;
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if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
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ret = nouveau_mem_init_agp(dev);
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if (ret) {
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NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
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return ret;
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}
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}
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NV_INFO(dev, "Reinitialising engines...\n");
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engine->instmem.resume(dev);
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engine->mc.init(dev);
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engine->timer.init(dev);
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engine->fb.init(dev);
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engine->graph.init(dev);
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engine->fifo.init(dev);
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NV_INFO(dev, "Restoring GPU objects...\n");
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nouveau_gpuobj_resume(dev);
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nouveau_irq_postinstall(dev);
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/* Re-write SKIPS, they'll have been lost over the suspend */
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if (nouveau_vram_pushbuf) {
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struct nouveau_channel *chan;
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int j;
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for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
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chan = dev_priv->fifos[i];
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if (!chan || !chan->pushbuf_bo)
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continue;
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for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
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nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
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}
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}
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NV_INFO(dev, "Restoring mode...\n");
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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struct nouveau_framebuffer *nouveau_fb;
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nouveau_fb = nouveau_framebuffer(crtc->fb);
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if (!nouveau_fb || !nouveau_fb->nvbo)
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continue;
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nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
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}
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if (dev_priv->card_type < NV_50) {
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nv04_display_restore(dev);
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NVLockVgaCrtcs(dev, false);
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} else
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nv50_display_init(dev);
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/* Force CLUT to get re-loaded during modeset */
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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nv_crtc->lut.depth = 0;
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}
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acquire_console_sem();
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fb_set_suspend(dev_priv->fbdev_info, 0);
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release_console_sem();
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nouveau_fbcon_zfill(dev);
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drm_helper_resume_force_mode(dev);
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dev_priv->fbdev_info->flags = fbdev_flags;
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return 0;
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}
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static struct drm_driver driver = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
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DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
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.load = nouveau_load,
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.firstopen = nouveau_firstopen,
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.lastclose = nouveau_lastclose,
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.unload = nouveau_unload,
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.preclose = nouveau_preclose,
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#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
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.debugfs_init = nouveau_debugfs_init,
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.debugfs_cleanup = nouveau_debugfs_takedown,
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#endif
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.irq_preinstall = nouveau_irq_preinstall,
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.irq_postinstall = nouveau_irq_postinstall,
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.irq_uninstall = nouveau_irq_uninstall,
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.irq_handler = nouveau_irq_handler,
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.reclaim_buffers = drm_core_reclaim_buffers,
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.get_map_ofs = drm_core_get_map_ofs,
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.get_reg_ofs = drm_core_get_reg_ofs,
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.ioctls = nouveau_ioctls,
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.fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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.unlocked_ioctl = drm_ioctl,
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.mmap = nouveau_ttm_mmap,
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.poll = drm_poll,
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.fasync = drm_fasync,
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#if defined(CONFIG_COMPAT)
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.compat_ioctl = nouveau_compat_ioctl,
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#endif
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},
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.pci_driver = {
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.name = DRIVER_NAME,
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.id_table = pciidlist,
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.probe = nouveau_pci_probe,
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.remove = nouveau_pci_remove,
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.suspend = nouveau_pci_suspend,
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.resume = nouveau_pci_resume
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},
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.gem_init_object = nouveau_gem_object_new,
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.gem_free_object = nouveau_gem_object_del,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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#ifdef GIT_REVISION
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.date = GIT_REVISION,
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#else
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.date = DRIVER_DATE,
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#endif
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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};
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static int __init nouveau_init(void)
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{
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driver.num_ioctls = nouveau_max_ioctl;
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if (nouveau_modeset == -1) {
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#ifdef CONFIG_VGA_CONSOLE
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if (vgacon_text_force())
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nouveau_modeset = 0;
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else
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#endif
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nouveau_modeset = 1;
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}
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if (nouveau_modeset == 1) {
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driver.driver_features |= DRIVER_MODESET;
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nouveau_register_dsm_handler();
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}
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return drm_init(&driver);
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}
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static void __exit nouveau_exit(void)
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{
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drm_exit(&driver);
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nouveau_unregister_dsm_handler();
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}
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module_init(nouveau_init);
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module_exit(nouveau_exit);
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL and additional rights");
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