forked from Minki/linux
99a0d9f5e8
Core changes: - Expose pull up/down flags for the GPIO character device to userspace. After clear input from the RaspberryPi and Beagle communities, it has been established that prototyping, industrial automation and make communities strongly need this feature, and as we want people to use the character device, we have implemented the simple pull up/down interface for GPIO lines. This means we can specify that a (chip-specific) pull up/down resistor can be enabled, but does not offer fine-grained control such as cases where the resistance of the same pull resistor can be controlled (yet). - Introduce devm_fwnode_gpiod_get_index() and start to phase out the old symbol devm_fwnode_get_index_gpiod_from_child(). - A bit of documentation clean-up work. - Introduce a define for GPIO line directions and deploy it in all GPIO drivers in the drivers/gpio directory. - Add a special callback to populate pin ranges when cooperating with the pin control subsystem and registering ranges as part of adding a gpiolib driver and a gpio_irq_chip driver at the same time. This is also deployed in the Intel Merrifield driver. New drivers: - RDA Micro GPIO controller. - XGS-iproc GPIO driver. Driver improvements: - Wake event and debounce support on the Tegra 186 driver. - Finalize the Aspeed SGPIO driver. - MPC8xxx uses a normal IRQ handler rather than a chained handler. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl3hIDcACgkQQRCzN7AZ XXOOyw/8DcaBV6j3EZPDS+b+N74/flNf9JitdJRCtUPn8mjdm+uKNPxbtL/znZc8 zd3rlpiZOqHy8klB3gOPJsJhgXY9QX/b+F5j8fHZvu0DACugRndCqMJ7wrgwUiPn 2ni6KJmz6z5urhcfaAIgyinTWOMegvSVfqjISaUCRCAg3F9dIeQoulRvTPk2ybvv f31jAGemGbvvQPpd81SYCxuTbMg+jxBIgnOCaX+VmUaBLzh8J2W4It3Myp6M4Sbg Td6QU4b2J2Q0quk/Dc7c4saT+qRODkg2syPKV2YqmWwdLRDxZyKESMdkCXLWlWJU fP+KZ4lDxhCaOAYUrY2sEAYMw4E8MzrfeWikdIe0nk0DWqNQhWvDyzsNsB90XGFb aGgeCPH2W1MdE6usPhLidBaHbLeowzndw5BiEl0UCJUqz7tzTCd5iMIAhoSU/Sr5 ymO8J45G9rdx5pscA3cXhpR/PmqaETYQ/uNrLuxTdI4F4xY12+M0vPrV8z3oDPxB U/uL0v6HndDcFAavQQiMd9eL6Hocirnn+Z2xFut3nOznHY96ozXSnZb3lzvH/kqI Du2C8geboVcZsiZJTKVN1zxnfIA8oDauzTOEpGFbIGFhmy0zt4RRRptL4W8NxeFm KCOk/HqlGeuqJ49epta3mqhUC0MSASA9fdicCdiDqvw+puEznwU= =o13I -----END PGP SIGNATURE----- Merge tag 'gpio-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v5.5 kernel cycle Core changes: - Expose pull up/down flags for the GPIO character device to userspace. After clear input from the RaspberryPi and Beagle communities, it has been established that prototyping, industrial automation and make communities strongly need this feature, and as we want people to use the character device, we have implemented the simple pull up/down interface for GPIO lines. This means we can specify that a (chip-specific) pull up/down resistor can be enabled, but does not offer fine-grained control such as cases where the resistance of the same pull resistor can be controlled (yet). - Introduce devm_fwnode_gpiod_get_index() and start to phase out the old symbol devm_fwnode_get_index_gpiod_from_child(). - A bit of documentation clean-up work. - Introduce a define for GPIO line directions and deploy it in all GPIO drivers in the drivers/gpio directory. - Add a special callback to populate pin ranges when cooperating with the pin control subsystem and registering ranges as part of adding a gpiolib driver and a gpio_irq_chip driver at the same time. This is also deployed in the Intel Merrifield driver. New drivers: - RDA Micro GPIO controller. - XGS-iproc GPIO driver. Driver improvements: - Wake event and debounce support on the Tegra 186 driver. - Finalize the Aspeed SGPIO driver. - MPC8xxx uses a normal IRQ handler rather than a chained handler" * tag 'gpio-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (64 commits) gpio: Add TODO item for regmap helper Documentation: gpio: driver.rst: Fix warnings gpio: of: Fix bogus reference to gpiod_get_count() gpiolib: Grammar s/manager/managed/ gpio: lynxpoint: Setup correct IRQ handlers MAINTAINERS: Replace my email by one @kernel.org gpiolib: acpi: Make acpi_gpiochip_alloc_event always return AE_OK gpio/mpc8xxx: fix qoriq GPIO reading gpio: mpc8xxx: Don't overwrite default irq_set_type callback gpiolib: acpi: Print pin number on acpi_gpiochip_alloc_event errors gpiolib: fix coding style in gpiod_hog() drm/bridge: ti-tfp410: switch to using fwnode_gpiod_get_index() gpio: merrifield: Pass irqchip when adding gpiochip gpio: merrifield: Add GPIO <-> pin mapping ranges via callback gpiolib: Introduce ->add_pin_ranges() callback gpio: mmio: remove untrue leftover comment gpio: em: Use platform_get_irq() to obtain interrupts gpio: tegra186: Add debounce support gpio: tegra186: Program interrupt route mapping gpio: tegra186: Derive register offsets from bank/port ...
341 lines
8.8 KiB
C
341 lines
8.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MAXIM MAX77620 GPIO driver
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*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*/
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#include <linux/gpio/driver.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/max77620.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#define GPIO_REG_ADDR(offset) (MAX77620_REG_GPIO0 + offset)
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struct max77620_gpio {
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struct gpio_chip gpio_chip;
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struct regmap *rmap;
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struct device *dev;
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struct mutex buslock; /* irq_bus_lock */
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unsigned int irq_type[8];
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bool irq_enabled[8];
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};
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static irqreturn_t max77620_gpio_irqhandler(int irq, void *data)
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{
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struct max77620_gpio *gpio = data;
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unsigned int value, offset;
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unsigned long pending;
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int err;
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err = regmap_read(gpio->rmap, MAX77620_REG_IRQ_LVL2_GPIO, &value);
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if (err < 0) {
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dev_err(gpio->dev, "REG_IRQ_LVL2_GPIO read failed: %d\n", err);
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return IRQ_NONE;
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}
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pending = value;
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for_each_set_bit(offset, &pending, 8) {
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unsigned int virq;
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virq = irq_find_mapping(gpio->gpio_chip.irq.domain, offset);
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handle_nested_irq(virq);
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}
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return IRQ_HANDLED;
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}
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static void max77620_gpio_irq_mask(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct max77620_gpio *gpio = gpiochip_get_data(chip);
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gpio->irq_enabled[data->hwirq] = false;
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}
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static void max77620_gpio_irq_unmask(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct max77620_gpio *gpio = gpiochip_get_data(chip);
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gpio->irq_enabled[data->hwirq] = true;
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}
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static int max77620_gpio_set_irq_type(struct irq_data *data, unsigned int type)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct max77620_gpio *gpio = gpiochip_get_data(chip);
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unsigned int irq_type;
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switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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irq_type = MAX77620_CNFG_GPIO_INT_RISING;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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irq_type = MAX77620_CNFG_GPIO_INT_FALLING;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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irq_type = MAX77620_CNFG_GPIO_INT_RISING |
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MAX77620_CNFG_GPIO_INT_FALLING;
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break;
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default:
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return -EINVAL;
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}
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gpio->irq_type[data->hwirq] = irq_type;
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return 0;
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}
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static void max77620_gpio_bus_lock(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct max77620_gpio *gpio = gpiochip_get_data(chip);
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mutex_lock(&gpio->buslock);
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}
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static void max77620_gpio_bus_sync_unlock(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct max77620_gpio *gpio = gpiochip_get_data(chip);
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unsigned int value, offset = data->hwirq;
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int err;
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value = gpio->irq_enabled[offset] ? gpio->irq_type[offset] : 0;
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err = regmap_update_bits(gpio->rmap, GPIO_REG_ADDR(offset),
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MAX77620_CNFG_GPIO_INT_MASK, value);
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if (err < 0)
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dev_err(chip->parent, "failed to update interrupt mask: %d\n",
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err);
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mutex_unlock(&gpio->buslock);
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}
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static struct irq_chip max77620_gpio_irqchip = {
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.name = "max77620-gpio",
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.irq_mask = max77620_gpio_irq_mask,
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.irq_unmask = max77620_gpio_irq_unmask,
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.irq_set_type = max77620_gpio_set_irq_type,
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.irq_bus_lock = max77620_gpio_bus_lock,
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.irq_bus_sync_unlock = max77620_gpio_bus_sync_unlock,
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.flags = IRQCHIP_MASK_ON_SUSPEND,
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};
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static int max77620_gpio_dir_input(struct gpio_chip *gc, unsigned int offset)
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{
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struct max77620_gpio *mgpio = gpiochip_get_data(gc);
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int ret;
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ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
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MAX77620_CNFG_GPIO_DIR_MASK,
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MAX77620_CNFG_GPIO_DIR_INPUT);
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if (ret < 0)
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dev_err(mgpio->dev, "CNFG_GPIOx dir update failed: %d\n", ret);
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return ret;
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}
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static int max77620_gpio_get(struct gpio_chip *gc, unsigned int offset)
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{
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struct max77620_gpio *mgpio = gpiochip_get_data(gc);
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unsigned int val;
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int ret;
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ret = regmap_read(mgpio->rmap, GPIO_REG_ADDR(offset), &val);
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if (ret < 0) {
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dev_err(mgpio->dev, "CNFG_GPIOx read failed: %d\n", ret);
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return ret;
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}
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if (val & MAX77620_CNFG_GPIO_DIR_MASK)
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return !!(val & MAX77620_CNFG_GPIO_INPUT_VAL_MASK);
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else
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return !!(val & MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK);
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}
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static int max77620_gpio_dir_output(struct gpio_chip *gc, unsigned int offset,
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int value)
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{
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struct max77620_gpio *mgpio = gpiochip_get_data(gc);
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u8 val;
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int ret;
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val = (value) ? MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH :
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MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
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ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
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MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
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if (ret < 0) {
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dev_err(mgpio->dev, "CNFG_GPIOx val update failed: %d\n", ret);
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return ret;
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}
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ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
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MAX77620_CNFG_GPIO_DIR_MASK,
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MAX77620_CNFG_GPIO_DIR_OUTPUT);
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if (ret < 0)
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dev_err(mgpio->dev, "CNFG_GPIOx dir update failed: %d\n", ret);
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return ret;
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}
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static int max77620_gpio_set_debounce(struct max77620_gpio *mgpio,
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unsigned int offset,
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unsigned int debounce)
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{
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u8 val;
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int ret;
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switch (debounce) {
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case 0:
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val = MAX77620_CNFG_GPIO_DBNC_None;
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break;
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case 1 ... 8000:
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val = MAX77620_CNFG_GPIO_DBNC_8ms;
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break;
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case 8001 ... 16000:
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val = MAX77620_CNFG_GPIO_DBNC_16ms;
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break;
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case 16001 ... 32000:
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val = MAX77620_CNFG_GPIO_DBNC_32ms;
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break;
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default:
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dev_err(mgpio->dev, "Illegal value %u\n", debounce);
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return -EINVAL;
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}
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ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
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MAX77620_CNFG_GPIO_DBNC_MASK, val);
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if (ret < 0)
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dev_err(mgpio->dev, "CNFG_GPIOx_DBNC update failed: %d\n", ret);
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return ret;
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}
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static void max77620_gpio_set(struct gpio_chip *gc, unsigned int offset,
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int value)
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{
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struct max77620_gpio *mgpio = gpiochip_get_data(gc);
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u8 val;
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int ret;
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val = (value) ? MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH :
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MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
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ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
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MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
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if (ret < 0)
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dev_err(mgpio->dev, "CNFG_GPIO_OUT update failed: %d\n", ret);
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}
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static int max77620_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
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unsigned long config)
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{
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struct max77620_gpio *mgpio = gpiochip_get_data(gc);
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switch (pinconf_to_config_param(config)) {
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case PIN_CONFIG_DRIVE_OPEN_DRAIN:
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return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
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MAX77620_CNFG_GPIO_DRV_MASK,
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MAX77620_CNFG_GPIO_DRV_OPENDRAIN);
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case PIN_CONFIG_DRIVE_PUSH_PULL:
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return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
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MAX77620_CNFG_GPIO_DRV_MASK,
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MAX77620_CNFG_GPIO_DRV_PUSHPULL);
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case PIN_CONFIG_INPUT_DEBOUNCE:
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return max77620_gpio_set_debounce(mgpio, offset,
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pinconf_to_config_argument(config));
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default:
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break;
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}
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return -ENOTSUPP;
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}
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static int max77620_gpio_probe(struct platform_device *pdev)
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{
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struct max77620_chip *chip = dev_get_drvdata(pdev->dev.parent);
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struct max77620_gpio *mgpio;
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int gpio_irq;
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int ret;
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gpio_irq = platform_get_irq(pdev, 0);
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if (gpio_irq <= 0)
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return -ENODEV;
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mgpio = devm_kzalloc(&pdev->dev, sizeof(*mgpio), GFP_KERNEL);
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if (!mgpio)
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return -ENOMEM;
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mgpio->rmap = chip->rmap;
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mgpio->dev = &pdev->dev;
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mgpio->gpio_chip.label = pdev->name;
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mgpio->gpio_chip.parent = &pdev->dev;
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mgpio->gpio_chip.direction_input = max77620_gpio_dir_input;
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mgpio->gpio_chip.get = max77620_gpio_get;
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mgpio->gpio_chip.direction_output = max77620_gpio_dir_output;
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mgpio->gpio_chip.set = max77620_gpio_set;
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mgpio->gpio_chip.set_config = max77620_gpio_set_config;
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mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR;
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mgpio->gpio_chip.can_sleep = 1;
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mgpio->gpio_chip.base = -1;
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#ifdef CONFIG_OF_GPIO
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mgpio->gpio_chip.of_node = pdev->dev.parent->of_node;
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#endif
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platform_set_drvdata(pdev, mgpio);
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ret = devm_gpiochip_add_data(&pdev->dev, &mgpio->gpio_chip, mgpio);
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if (ret < 0) {
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dev_err(&pdev->dev, "gpio_init: Failed to add max77620_gpio\n");
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return ret;
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}
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mutex_init(&mgpio->buslock);
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gpiochip_irqchip_add_nested(&mgpio->gpio_chip, &max77620_gpio_irqchip,
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0, handle_edge_irq, IRQ_TYPE_NONE);
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ret = request_threaded_irq(gpio_irq, NULL, max77620_gpio_irqhandler,
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IRQF_ONESHOT, "max77620-gpio", mgpio);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to request IRQ: %d\n", ret);
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return ret;
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}
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gpiochip_set_nested_irqchip(&mgpio->gpio_chip, &max77620_gpio_irqchip,
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gpio_irq);
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return 0;
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}
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static const struct platform_device_id max77620_gpio_devtype[] = {
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{ .name = "max77620-gpio", },
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{ .name = "max20024-gpio", },
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{},
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};
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MODULE_DEVICE_TABLE(platform, max77620_gpio_devtype);
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static struct platform_driver max77620_gpio_driver = {
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.driver.name = "max77620-gpio",
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.probe = max77620_gpio_probe,
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.id_table = max77620_gpio_devtype,
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};
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module_platform_driver(max77620_gpio_driver);
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MODULE_DESCRIPTION("GPIO interface for MAX77620 and MAX20024 PMIC");
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MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
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MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
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MODULE_ALIAS("platform:max77620-gpio");
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MODULE_LICENSE("GPL v2");
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