Will Deacon 0ca326de7a locking, ARM, atomics: Define our SMP atomics in terms of _relaxed() operations ... By defining our SMP atomics in terms of relaxed operations, we gain a small reduction in code size and have acquire/release/fence variants generated automatically by the core code. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Waiman.Long@hp.com Cc: paulmck@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/1438880084-18856-9-git-send-email-will.deacon@arm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>		2015-08-12 11:59:10 +02:00
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asm	locking, ARM, atomics: Define our SMP atomics in terms of _relaxed() operations	2015-08-12 11:59:10 +02:00
debug	The i.MX SoC updates for 4.2:	2015-06-10 16:58:05 -07:00
uapi/asm	This mostly includes the PPC changes for 4.1, which this time cover	2015-04-26 13:06:22 -07:00