forked from Minki/linux
f3cf3fb7ec
Usual mixed bag, but the big item perhaps in this series is the DMA buffer support added by Lars-Peter Clausen. It's been in the works for a long time and it will be interesting to see what hardware support shows up now that this is available. New core features + associate cleanup. * Add generic DMA buffer infrastructure * Add a DMAengine framework based buffer Also associated minor changes. - Set the device buffer watermark based on the minimum watermark for all attached buffers rather than just the 'primary' one. - iio_buffer_init - only set the watermark default if one hasn't already been provided. This allows simple support for devices with a fixed watermark. - read only attribute for watermark on fixed watermark devices. - add explicit buffer enable/disable callbacks to allow the buffer to do more than trivial actions when it is being turned on and off. * IIO_VAL_INT support in write_raw_get_fmt function. New device support * Freescale MMA7455/7456L accelerometers * Memsic MXC6255XC accelerometer * ST lis2dh12 accelerometer * TI ADS8688 ADC * TI Palamas (twl6035/7) gpadc New driver features * mma8452 - support either of the available interrupt pins to cope with the case where board layout has lead to a particular one being connected. Staging graduation * Dummy driver - this driver acts as both an example and a test device for those with out hardware to develop userspace code against. Cleanups and minor bits and bobs. * treewide - Sort out the ordering of iio_device_register/unregister vs runtime pm function calls so that it's all nice and consistent and not race prone. - Check sscanf return values. None of the cases will actually happen as the strings are supplied internally, but best to be consistent on this. * ad7780 - switch over to the gpio descriptor interface and remove the now unused platform data which gets rid of a header entirely. * ad7793 - drop a pointless else statement. * at91_adc - Swap kmalloc_array in for a kmalloc doing the same job. * dummy - get rid of some commented out lines that snuck in during the move of the driver. * lm3533-als - Print an error message on provision of an invalid resistance. * mcp320x - Add compatible strings with vendor prefix and deprecate those with no vendor prefix. * mxs-lradc - Use BIT macro in various places rather than shifted ones. * pa12203001 - Power off the chip if the registration fails. * pulsedlight-lidar-lite - add runtime PM support. * xilinx XADC - constify an iio_buffer_setup_ops structure. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJWUcmhAAoJEFSFNJnE9BaIyjYP/0A+CZMUqIGbYG9qFxnq7yYZ 977Wt/gGI8+Jq5RwNw6gTfhp2GrCN+5gzDbE2mBEn94c6SKBrj2Q9trW1FQ+Nhfx 9bZoyq3ZPRCV+efEDGfeK/JWRwv+V6IWwAF2J/iCPWpRMTEsIW5kM1JSO3ISlnma diyil1hefGTJY8aCqGApthfX4fyZK98oCV6zojxpCZfFPdsa+vf5n1RQ143odnOk 6NSfXHYLI+2e+mJ1lw4GdpZdF+rF+7jWsUYC5EDNmvlIJYiKmm13whSQeWO0NHo8 oD0pYboSIWnmdXx4s3RbWF2+Y28O1+oJDKZfXabB8DjVwtvlGnmWBRhgKji2e6E6 Hhct83YbDWtEpbNkXcWpnc5v5ynmAMTYTxADhinTGUtVQh3Q4wWduuoHK6IyeI4s dbfpO2Wh6N/5k3a4UoA69IcI2DzPzb2sIFWpdS8wuNv5xDhV2OmmY2PjTfq2w+Qz hEoMCNDUG6rQAYf4auXK5JjhI4CaG/mz/qjIibTUqGODYECzQQyvq+c2Gdq0S8O/ CUHOgui6aHbyuhWmXlEzhhkjuvBQZYaTxCA+LGMzy8w7UY9m4n5L/fX9M9IfFsMH NFCPrUfmxKPQj/mHlhu7KHaTMUlQ0pTqV5flSwqsjstZ2QddvI5EAKiLwIEhg7/2 RpnOZoiFIxykduEYLxeh =CfCl -----END PGP SIGNATURE----- Merge tag 'iio-for-4.5a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next Jonathan writes: First set of new device support, features and cleanups for IIO in the 4.5 cycle Usual mixed bag, but the big item perhaps in this series is the DMA buffer support added by Lars-Peter Clausen. It's been in the works for a long time and it will be interesting to see what hardware support shows up now that this is available. New core features + associate cleanup. * Add generic DMA buffer infrastructure * Add a DMAengine framework based buffer Also associated minor changes. - Set the device buffer watermark based on the minimum watermark for all attached buffers rather than just the 'primary' one. - iio_buffer_init - only set the watermark default if one hasn't already been provided. This allows simple support for devices with a fixed watermark. - read only attribute for watermark on fixed watermark devices. - add explicit buffer enable/disable callbacks to allow the buffer to do more than trivial actions when it is being turned on and off. * IIO_VAL_INT support in write_raw_get_fmt function. New device support * Freescale MMA7455/7456L accelerometers * Memsic MXC6255XC accelerometer * ST lis2dh12 accelerometer * TI ADS8688 ADC * TI Palamas (twl6035/7) gpadc New driver features * mma8452 - support either of the available interrupt pins to cope with the case where board layout has lead to a particular one being connected. Staging graduation * Dummy driver - this driver acts as both an example and a test device for those with out hardware to develop userspace code against. Cleanups and minor bits and bobs. * treewide - Sort out the ordering of iio_device_register/unregister vs runtime pm function calls so that it's all nice and consistent and not race prone. - Check sscanf return values. None of the cases will actually happen as the strings are supplied internally, but best to be consistent on this. * ad7780 - switch over to the gpio descriptor interface and remove the now unused platform data which gets rid of a header entirely. * ad7793 - drop a pointless else statement. * at91_adc - Swap kmalloc_array in for a kmalloc doing the same job. * dummy - get rid of some commented out lines that snuck in during the move of the driver. * lm3533-als - Print an error message on provision of an invalid resistance. * mcp320x - Add compatible strings with vendor prefix and deprecate those with no vendor prefix. * mxs-lradc - Use BIT macro in various places rather than shifted ones. * pa12203001 - Power off the chip if the registration fails. * pulsedlight-lidar-lite - add runtime PM support. * xilinx XADC - constify an iio_buffer_setup_ops structure.
711 lines
20 KiB
C
711 lines
20 KiB
C
/*
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* STMicroelectronics accelerometers driver
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*
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* Copyright 2012-2013 STMicroelectronics Inc.
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*
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* Denis Ciocca <denis.ciocca@st.com>
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/mutex.h>
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#include <linux/interrupt.h>
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#include <linux/i2c.h>
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#include <linux/gpio.h>
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#include <linux/irq.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/common/st_sensors.h>
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#include "st_accel.h"
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#define ST_ACCEL_NUMBER_DATA_CHANNELS 3
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/* DEFAULT VALUE FOR SENSORS */
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#define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
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#define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
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#define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
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/* FULLSCALE */
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#define ST_ACCEL_FS_AVL_2G 2
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#define ST_ACCEL_FS_AVL_4G 4
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#define ST_ACCEL_FS_AVL_6G 6
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#define ST_ACCEL_FS_AVL_8G 8
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#define ST_ACCEL_FS_AVL_16G 16
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/* CUSTOM VALUES FOR SENSOR 1 */
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#define ST_ACCEL_1_WAI_EXP 0x33
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#define ST_ACCEL_1_ODR_ADDR 0x20
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#define ST_ACCEL_1_ODR_MASK 0xf0
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#define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01
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#define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02
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#define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03
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#define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04
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#define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05
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#define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06
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#define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07
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#define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08
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#define ST_ACCEL_1_FS_ADDR 0x23
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#define ST_ACCEL_1_FS_MASK 0x30
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#define ST_ACCEL_1_FS_AVL_2_VAL 0x00
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#define ST_ACCEL_1_FS_AVL_4_VAL 0x01
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#define ST_ACCEL_1_FS_AVL_8_VAL 0x02
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#define ST_ACCEL_1_FS_AVL_16_VAL 0x03
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#define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
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#define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
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#define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000)
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#define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000)
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#define ST_ACCEL_1_BDU_ADDR 0x23
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#define ST_ACCEL_1_BDU_MASK 0x80
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#define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22
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#define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10
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#define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08
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#define ST_ACCEL_1_MULTIREAD_BIT true
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/* CUSTOM VALUES FOR SENSOR 2 */
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#define ST_ACCEL_2_WAI_EXP 0x32
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#define ST_ACCEL_2_ODR_ADDR 0x20
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#define ST_ACCEL_2_ODR_MASK 0x18
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#define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00
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#define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01
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#define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02
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#define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03
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#define ST_ACCEL_2_PW_ADDR 0x20
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#define ST_ACCEL_2_PW_MASK 0xe0
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#define ST_ACCEL_2_FS_ADDR 0x23
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#define ST_ACCEL_2_FS_MASK 0x30
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#define ST_ACCEL_2_FS_AVL_2_VAL 0X00
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#define ST_ACCEL_2_FS_AVL_4_VAL 0X01
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#define ST_ACCEL_2_FS_AVL_8_VAL 0x03
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#define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
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#define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
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#define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900)
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#define ST_ACCEL_2_BDU_ADDR 0x23
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#define ST_ACCEL_2_BDU_MASK 0x80
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#define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22
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#define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02
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#define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10
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#define ST_ACCEL_2_MULTIREAD_BIT true
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/* CUSTOM VALUES FOR SENSOR 3 */
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#define ST_ACCEL_3_WAI_EXP 0x40
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#define ST_ACCEL_3_ODR_ADDR 0x20
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#define ST_ACCEL_3_ODR_MASK 0xf0
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#define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01
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#define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02
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#define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03
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#define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04
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#define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05
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#define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06
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#define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07
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#define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08
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#define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09
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#define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a
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#define ST_ACCEL_3_FS_ADDR 0x24
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#define ST_ACCEL_3_FS_MASK 0x38
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#define ST_ACCEL_3_FS_AVL_2_VAL 0X00
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#define ST_ACCEL_3_FS_AVL_4_VAL 0X01
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#define ST_ACCEL_3_FS_AVL_6_VAL 0x02
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#define ST_ACCEL_3_FS_AVL_8_VAL 0x03
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#define ST_ACCEL_3_FS_AVL_16_VAL 0x04
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#define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61)
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#define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122)
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#define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183)
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#define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244)
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#define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732)
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#define ST_ACCEL_3_BDU_ADDR 0x20
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#define ST_ACCEL_3_BDU_MASK 0x08
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#define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23
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#define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80
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#define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00
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#define ST_ACCEL_3_IG1_EN_ADDR 0x23
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#define ST_ACCEL_3_IG1_EN_MASK 0x08
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#define ST_ACCEL_3_MULTIREAD_BIT false
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/* CUSTOM VALUES FOR SENSOR 4 */
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#define ST_ACCEL_4_WAI_EXP 0x3a
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#define ST_ACCEL_4_ODR_ADDR 0x20
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#define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */
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#define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00
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#define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01
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#define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02
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#define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03
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#define ST_ACCEL_4_PW_ADDR 0x20
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#define ST_ACCEL_4_PW_MASK 0xc0
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#define ST_ACCEL_4_FS_ADDR 0x21
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#define ST_ACCEL_4_FS_MASK 0x80
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#define ST_ACCEL_4_FS_AVL_2_VAL 0X00
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#define ST_ACCEL_4_FS_AVL_6_VAL 0X01
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#define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024)
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#define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340)
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#define ST_ACCEL_4_BDU_ADDR 0x21
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#define ST_ACCEL_4_BDU_MASK 0x40
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#define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
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#define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
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#define ST_ACCEL_4_MULTIREAD_BIT true
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/* CUSTOM VALUES FOR SENSOR 5 */
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#define ST_ACCEL_5_WAI_EXP 0x3b
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#define ST_ACCEL_5_ODR_ADDR 0x20
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#define ST_ACCEL_5_ODR_MASK 0x80
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#define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
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#define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
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#define ST_ACCEL_5_PW_ADDR 0x20
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#define ST_ACCEL_5_PW_MASK 0x40
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#define ST_ACCEL_5_FS_ADDR 0x20
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#define ST_ACCEL_5_FS_MASK 0x20
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#define ST_ACCEL_5_FS_AVL_2_VAL 0X00
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#define ST_ACCEL_5_FS_AVL_8_VAL 0X01
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/* TODO: check these resulting gain settings, these are not in the datsheet */
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#define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
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#define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
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#define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
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#define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
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#define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
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#define ST_ACCEL_5_IG1_EN_ADDR 0x21
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#define ST_ACCEL_5_IG1_EN_MASK 0x08
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#define ST_ACCEL_5_MULTIREAD_BIT false
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static const struct iio_chan_spec st_accel_8bit_channels[] = {
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
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ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1),
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
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ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1),
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
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ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1),
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IIO_CHAN_SOFT_TIMESTAMP(3)
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};
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static const struct iio_chan_spec st_accel_12bit_channels[] = {
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
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ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
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ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
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ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
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IIO_CHAN_SOFT_TIMESTAMP(3)
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};
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static const struct iio_chan_spec st_accel_16bit_channels[] = {
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
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ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
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ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
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ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
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ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
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IIO_CHAN_SOFT_TIMESTAMP(3)
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};
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static const struct st_sensor_settings st_accel_sensors_settings[] = {
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{
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.wai = ST_ACCEL_1_WAI_EXP,
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.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
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.sensors_supported = {
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[0] = LIS3DH_ACCEL_DEV_NAME,
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[1] = LSM303DLHC_ACCEL_DEV_NAME,
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[2] = LSM330D_ACCEL_DEV_NAME,
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[3] = LSM330DL_ACCEL_DEV_NAME,
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[4] = LSM330DLC_ACCEL_DEV_NAME,
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[5] = LSM303AGR_ACCEL_DEV_NAME,
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[6] = LIS2DH12_ACCEL_DEV_NAME,
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},
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.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
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.odr = {
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.addr = ST_ACCEL_1_ODR_ADDR,
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.mask = ST_ACCEL_1_ODR_MASK,
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.odr_avl = {
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{ 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, },
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{ 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, },
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{ 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, },
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{ 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, },
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{ 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, },
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{ 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, },
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{ 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, },
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{ 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, },
|
|
},
|
|
},
|
|
.pw = {
|
|
.addr = ST_ACCEL_1_ODR_ADDR,
|
|
.mask = ST_ACCEL_1_ODR_MASK,
|
|
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
|
|
},
|
|
.enable_axis = {
|
|
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
|
|
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
|
|
},
|
|
.fs = {
|
|
.addr = ST_ACCEL_1_FS_ADDR,
|
|
.mask = ST_ACCEL_1_FS_MASK,
|
|
.fs_avl = {
|
|
[0] = {
|
|
.num = ST_ACCEL_FS_AVL_2G,
|
|
.value = ST_ACCEL_1_FS_AVL_2_VAL,
|
|
.gain = ST_ACCEL_1_FS_AVL_2_GAIN,
|
|
},
|
|
[1] = {
|
|
.num = ST_ACCEL_FS_AVL_4G,
|
|
.value = ST_ACCEL_1_FS_AVL_4_VAL,
|
|
.gain = ST_ACCEL_1_FS_AVL_4_GAIN,
|
|
},
|
|
[2] = {
|
|
.num = ST_ACCEL_FS_AVL_8G,
|
|
.value = ST_ACCEL_1_FS_AVL_8_VAL,
|
|
.gain = ST_ACCEL_1_FS_AVL_8_GAIN,
|
|
},
|
|
[3] = {
|
|
.num = ST_ACCEL_FS_AVL_16G,
|
|
.value = ST_ACCEL_1_FS_AVL_16_VAL,
|
|
.gain = ST_ACCEL_1_FS_AVL_16_GAIN,
|
|
},
|
|
},
|
|
},
|
|
.bdu = {
|
|
.addr = ST_ACCEL_1_BDU_ADDR,
|
|
.mask = ST_ACCEL_1_BDU_MASK,
|
|
},
|
|
.drdy_irq = {
|
|
.addr = ST_ACCEL_1_DRDY_IRQ_ADDR,
|
|
.mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK,
|
|
.mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK,
|
|
},
|
|
.multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT,
|
|
.bootime = 2,
|
|
},
|
|
{
|
|
.wai = ST_ACCEL_2_WAI_EXP,
|
|
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
|
|
.sensors_supported = {
|
|
[0] = LIS331DLH_ACCEL_DEV_NAME,
|
|
[1] = LSM303DL_ACCEL_DEV_NAME,
|
|
[2] = LSM303DLH_ACCEL_DEV_NAME,
|
|
[3] = LSM303DLM_ACCEL_DEV_NAME,
|
|
},
|
|
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
|
|
.odr = {
|
|
.addr = ST_ACCEL_2_ODR_ADDR,
|
|
.mask = ST_ACCEL_2_ODR_MASK,
|
|
.odr_avl = {
|
|
{ 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, },
|
|
{ 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, },
|
|
{ 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, },
|
|
{ 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, },
|
|
},
|
|
},
|
|
.pw = {
|
|
.addr = ST_ACCEL_2_PW_ADDR,
|
|
.mask = ST_ACCEL_2_PW_MASK,
|
|
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
|
|
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
|
|
},
|
|
.enable_axis = {
|
|
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
|
|
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
|
|
},
|
|
.fs = {
|
|
.addr = ST_ACCEL_2_FS_ADDR,
|
|
.mask = ST_ACCEL_2_FS_MASK,
|
|
.fs_avl = {
|
|
[0] = {
|
|
.num = ST_ACCEL_FS_AVL_2G,
|
|
.value = ST_ACCEL_2_FS_AVL_2_VAL,
|
|
.gain = ST_ACCEL_2_FS_AVL_2_GAIN,
|
|
},
|
|
[1] = {
|
|
.num = ST_ACCEL_FS_AVL_4G,
|
|
.value = ST_ACCEL_2_FS_AVL_4_VAL,
|
|
.gain = ST_ACCEL_2_FS_AVL_4_GAIN,
|
|
},
|
|
[2] = {
|
|
.num = ST_ACCEL_FS_AVL_8G,
|
|
.value = ST_ACCEL_2_FS_AVL_8_VAL,
|
|
.gain = ST_ACCEL_2_FS_AVL_8_GAIN,
|
|
},
|
|
},
|
|
},
|
|
.bdu = {
|
|
.addr = ST_ACCEL_2_BDU_ADDR,
|
|
.mask = ST_ACCEL_2_BDU_MASK,
|
|
},
|
|
.drdy_irq = {
|
|
.addr = ST_ACCEL_2_DRDY_IRQ_ADDR,
|
|
.mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK,
|
|
.mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK,
|
|
},
|
|
.multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT,
|
|
.bootime = 2,
|
|
},
|
|
{
|
|
.wai = ST_ACCEL_3_WAI_EXP,
|
|
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
|
|
.sensors_supported = {
|
|
[0] = LSM330_ACCEL_DEV_NAME,
|
|
},
|
|
.ch = (struct iio_chan_spec *)st_accel_16bit_channels,
|
|
.odr = {
|
|
.addr = ST_ACCEL_3_ODR_ADDR,
|
|
.mask = ST_ACCEL_3_ODR_MASK,
|
|
.odr_avl = {
|
|
{ 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL },
|
|
{ 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, },
|
|
{ 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, },
|
|
{ 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, },
|
|
{ 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, },
|
|
{ 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, },
|
|
{ 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, },
|
|
{ 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, },
|
|
{ 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, },
|
|
{ 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, },
|
|
},
|
|
},
|
|
.pw = {
|
|
.addr = ST_ACCEL_3_ODR_ADDR,
|
|
.mask = ST_ACCEL_3_ODR_MASK,
|
|
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
|
|
},
|
|
.enable_axis = {
|
|
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
|
|
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
|
|
},
|
|
.fs = {
|
|
.addr = ST_ACCEL_3_FS_ADDR,
|
|
.mask = ST_ACCEL_3_FS_MASK,
|
|
.fs_avl = {
|
|
[0] = {
|
|
.num = ST_ACCEL_FS_AVL_2G,
|
|
.value = ST_ACCEL_3_FS_AVL_2_VAL,
|
|
.gain = ST_ACCEL_3_FS_AVL_2_GAIN,
|
|
},
|
|
[1] = {
|
|
.num = ST_ACCEL_FS_AVL_4G,
|
|
.value = ST_ACCEL_3_FS_AVL_4_VAL,
|
|
.gain = ST_ACCEL_3_FS_AVL_4_GAIN,
|
|
},
|
|
[2] = {
|
|
.num = ST_ACCEL_FS_AVL_6G,
|
|
.value = ST_ACCEL_3_FS_AVL_6_VAL,
|
|
.gain = ST_ACCEL_3_FS_AVL_6_GAIN,
|
|
},
|
|
[3] = {
|
|
.num = ST_ACCEL_FS_AVL_8G,
|
|
.value = ST_ACCEL_3_FS_AVL_8_VAL,
|
|
.gain = ST_ACCEL_3_FS_AVL_8_GAIN,
|
|
},
|
|
[4] = {
|
|
.num = ST_ACCEL_FS_AVL_16G,
|
|
.value = ST_ACCEL_3_FS_AVL_16_VAL,
|
|
.gain = ST_ACCEL_3_FS_AVL_16_GAIN,
|
|
},
|
|
},
|
|
},
|
|
.bdu = {
|
|
.addr = ST_ACCEL_3_BDU_ADDR,
|
|
.mask = ST_ACCEL_3_BDU_MASK,
|
|
},
|
|
.drdy_irq = {
|
|
.addr = ST_ACCEL_3_DRDY_IRQ_ADDR,
|
|
.mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK,
|
|
.mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK,
|
|
.ig1 = {
|
|
.en_addr = ST_ACCEL_3_IG1_EN_ADDR,
|
|
.en_mask = ST_ACCEL_3_IG1_EN_MASK,
|
|
},
|
|
},
|
|
.multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
|
|
.bootime = 2,
|
|
},
|
|
{
|
|
.wai = ST_ACCEL_4_WAI_EXP,
|
|
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
|
|
.sensors_supported = {
|
|
[0] = LIS3LV02DL_ACCEL_DEV_NAME,
|
|
},
|
|
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
|
|
.odr = {
|
|
.addr = ST_ACCEL_4_ODR_ADDR,
|
|
.mask = ST_ACCEL_4_ODR_MASK,
|
|
.odr_avl = {
|
|
{ 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
|
|
{ 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
|
|
{ 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
|
|
{ 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
|
|
},
|
|
},
|
|
.pw = {
|
|
.addr = ST_ACCEL_4_PW_ADDR,
|
|
.mask = ST_ACCEL_4_PW_MASK,
|
|
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
|
|
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
|
|
},
|
|
.enable_axis = {
|
|
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
|
|
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
|
|
},
|
|
.fs = {
|
|
.addr = ST_ACCEL_4_FS_ADDR,
|
|
.mask = ST_ACCEL_4_FS_MASK,
|
|
.fs_avl = {
|
|
[0] = {
|
|
.num = ST_ACCEL_FS_AVL_2G,
|
|
.value = ST_ACCEL_4_FS_AVL_2_VAL,
|
|
.gain = ST_ACCEL_4_FS_AVL_2_GAIN,
|
|
},
|
|
[1] = {
|
|
.num = ST_ACCEL_FS_AVL_6G,
|
|
.value = ST_ACCEL_4_FS_AVL_6_VAL,
|
|
.gain = ST_ACCEL_4_FS_AVL_6_GAIN,
|
|
},
|
|
},
|
|
},
|
|
.bdu = {
|
|
.addr = ST_ACCEL_4_BDU_ADDR,
|
|
.mask = ST_ACCEL_4_BDU_MASK,
|
|
},
|
|
.drdy_irq = {
|
|
.addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
|
|
.mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
|
|
},
|
|
.multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
|
|
.bootime = 2, /* guess */
|
|
},
|
|
{
|
|
.wai = ST_ACCEL_5_WAI_EXP,
|
|
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
|
|
.sensors_supported = {
|
|
[0] = LIS331DL_ACCEL_DEV_NAME,
|
|
},
|
|
.ch = (struct iio_chan_spec *)st_accel_8bit_channels,
|
|
.odr = {
|
|
.addr = ST_ACCEL_5_ODR_ADDR,
|
|
.mask = ST_ACCEL_5_ODR_MASK,
|
|
.odr_avl = {
|
|
{ 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
|
|
{ 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
|
|
},
|
|
},
|
|
.pw = {
|
|
.addr = ST_ACCEL_5_PW_ADDR,
|
|
.mask = ST_ACCEL_5_PW_MASK,
|
|
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
|
|
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
|
|
},
|
|
.enable_axis = {
|
|
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
|
|
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
|
|
},
|
|
.fs = {
|
|
.addr = ST_ACCEL_5_FS_ADDR,
|
|
.mask = ST_ACCEL_5_FS_MASK,
|
|
.fs_avl = {
|
|
[0] = {
|
|
.num = ST_ACCEL_FS_AVL_2G,
|
|
.value = ST_ACCEL_5_FS_AVL_2_VAL,
|
|
.gain = ST_ACCEL_5_FS_AVL_2_GAIN,
|
|
},
|
|
[1] = {
|
|
.num = ST_ACCEL_FS_AVL_8G,
|
|
.value = ST_ACCEL_5_FS_AVL_8_VAL,
|
|
.gain = ST_ACCEL_5_FS_AVL_8_GAIN,
|
|
},
|
|
},
|
|
},
|
|
.drdy_irq = {
|
|
.addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
|
|
.mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
|
|
.mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
|
|
},
|
|
.multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
|
|
.bootime = 2, /* guess */
|
|
},
|
|
};
|
|
|
|
static int st_accel_read_raw(struct iio_dev *indio_dev,
|
|
struct iio_chan_spec const *ch, int *val,
|
|
int *val2, long mask)
|
|
{
|
|
int err;
|
|
struct st_sensor_data *adata = iio_priv(indio_dev);
|
|
|
|
switch (mask) {
|
|
case IIO_CHAN_INFO_RAW:
|
|
err = st_sensors_read_info_raw(indio_dev, ch, val);
|
|
if (err < 0)
|
|
goto read_error;
|
|
|
|
return IIO_VAL_INT;
|
|
case IIO_CHAN_INFO_SCALE:
|
|
*val = 0;
|
|
*val2 = adata->current_fullscale->gain;
|
|
return IIO_VAL_INT_PLUS_MICRO;
|
|
case IIO_CHAN_INFO_SAMP_FREQ:
|
|
*val = adata->odr;
|
|
return IIO_VAL_INT;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
read_error:
|
|
return err;
|
|
}
|
|
|
|
static int st_accel_write_raw(struct iio_dev *indio_dev,
|
|
struct iio_chan_spec const *chan, int val, int val2, long mask)
|
|
{
|
|
int err;
|
|
|
|
switch (mask) {
|
|
case IIO_CHAN_INFO_SCALE:
|
|
err = st_sensors_set_fullscale_by_gain(indio_dev, val2);
|
|
break;
|
|
case IIO_CHAN_INFO_SAMP_FREQ:
|
|
if (val2)
|
|
return -EINVAL;
|
|
mutex_lock(&indio_dev->mlock);
|
|
err = st_sensors_set_odr(indio_dev, val);
|
|
mutex_unlock(&indio_dev->mlock);
|
|
return err;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
|
|
static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
|
|
|
|
static struct attribute *st_accel_attributes[] = {
|
|
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
|
|
&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
|
|
NULL,
|
|
};
|
|
|
|
static const struct attribute_group st_accel_attribute_group = {
|
|
.attrs = st_accel_attributes,
|
|
};
|
|
|
|
static const struct iio_info accel_info = {
|
|
.driver_module = THIS_MODULE,
|
|
.attrs = &st_accel_attribute_group,
|
|
.read_raw = &st_accel_read_raw,
|
|
.write_raw = &st_accel_write_raw,
|
|
.debugfs_reg_access = &st_sensors_debugfs_reg_access,
|
|
};
|
|
|
|
#ifdef CONFIG_IIO_TRIGGER
|
|
static const struct iio_trigger_ops st_accel_trigger_ops = {
|
|
.owner = THIS_MODULE,
|
|
.set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
|
|
};
|
|
#define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
|
|
#else
|
|
#define ST_ACCEL_TRIGGER_OPS NULL
|
|
#endif
|
|
|
|
int st_accel_common_probe(struct iio_dev *indio_dev)
|
|
{
|
|
struct st_sensor_data *adata = iio_priv(indio_dev);
|
|
int irq = adata->get_irq_data_ready(indio_dev);
|
|
int err;
|
|
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->info = &accel_info;
|
|
mutex_init(&adata->tb.buf_lock);
|
|
|
|
st_sensors_power_enable(indio_dev);
|
|
|
|
err = st_sensors_check_device_support(indio_dev,
|
|
ARRAY_SIZE(st_accel_sensors_settings),
|
|
st_accel_sensors_settings);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
|
|
adata->multiread_bit = adata->sensor_settings->multi_read_bit;
|
|
indio_dev->channels = adata->sensor_settings->ch;
|
|
indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
|
|
|
|
adata->current_fullscale = (struct st_sensor_fullscale_avl *)
|
|
&adata->sensor_settings->fs.fs_avl[0];
|
|
adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
|
|
|
|
if (!adata->dev->platform_data)
|
|
adata->dev->platform_data =
|
|
(struct st_sensors_platform_data *)&default_accel_pdata;
|
|
|
|
err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
err = st_accel_allocate_ring(indio_dev);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
if (irq > 0) {
|
|
err = st_sensors_allocate_trigger(indio_dev,
|
|
ST_ACCEL_TRIGGER_OPS);
|
|
if (err < 0)
|
|
goto st_accel_probe_trigger_error;
|
|
}
|
|
|
|
err = iio_device_register(indio_dev);
|
|
if (err)
|
|
goto st_accel_device_register_error;
|
|
|
|
dev_info(&indio_dev->dev, "registered accelerometer %s\n",
|
|
indio_dev->name);
|
|
|
|
return 0;
|
|
|
|
st_accel_device_register_error:
|
|
if (irq > 0)
|
|
st_sensors_deallocate_trigger(indio_dev);
|
|
st_accel_probe_trigger_error:
|
|
st_accel_deallocate_ring(indio_dev);
|
|
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(st_accel_common_probe);
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void st_accel_common_remove(struct iio_dev *indio_dev)
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{
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struct st_sensor_data *adata = iio_priv(indio_dev);
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st_sensors_power_disable(indio_dev);
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iio_device_unregister(indio_dev);
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if (adata->get_irq_data_ready(indio_dev) > 0)
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st_sensors_deallocate_trigger(indio_dev);
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st_accel_deallocate_ring(indio_dev);
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}
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EXPORT_SYMBOL(st_accel_common_remove);
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MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
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MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
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MODULE_LICENSE("GPL v2");
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