forked from Minki/linux
aa24886e37
On at least ARM (and I'm told MIPS too) dma_free_coherent() has a newish call context requirement: unlike its dma_alloc_coherent() sibling, it may not be called with IRQs disabled. (This was new behavior on ARM as of late 2005, caused by ARM SMP updates.) This little surprise can be annoyingly driver-visible. Since it looks like that restriction won't be removed, this patch changes the definition of the API to include that requirement. Also, to help catch nonportable drivers, it updates the x86 and swiotlb versions to include the relevant warnings. (I already observed that it trips on the bus_reset_tasklet of the new firewire_ohci driver.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: David Miller <davem@davemloft.net> Acked-by: Russell King <rmk@arm.linux.org.uk> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
799 lines
22 KiB
C
799 lines
22 KiB
C
/*
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* Dynamic DMA mapping support.
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*
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* This implementation is a fallback for platforms that do not support
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* I/O TLBs (aka DMA address translation hardware).
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* Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
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* Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
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* Copyright (C) 2000, 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
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* 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
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* unnecessary i-cache flushing.
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* 04/07/.. ak Better overflow handling. Assorted fixes.
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* 05/09/10 linville Add support for syncing ranges, support syncing for
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* DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
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*/
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#include <linux/cache.h>
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#include <linux/dma-mapping.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ctype.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/scatterlist.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#define OFFSET(val,align) ((unsigned long) \
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( (val) & ( (align) - 1)))
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#define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset)
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#define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
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/*
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* Maximum allowable number of contiguous slabs to map,
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* must be a power of 2. What is the appropriate value ?
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* The complexity of {map,unmap}_single is linearly dependent on this value.
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*/
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#define IO_TLB_SEGSIZE 128
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/*
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* log of the size of each IO TLB slab. The number of slabs is command line
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* controllable.
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*/
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#define IO_TLB_SHIFT 11
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#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
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/*
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* Minimum IO TLB size to bother booting with. Systems with mainly
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* 64bit capable cards will only lightly use the swiotlb. If we can't
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* allocate a contiguous 1MB, we're probably in trouble anyway.
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*/
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#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
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/*
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* Enumeration for sync targets
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*/
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enum dma_sync_target {
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SYNC_FOR_CPU = 0,
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SYNC_FOR_DEVICE = 1,
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};
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int swiotlb_force;
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/*
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* Used to do a quick range check in swiotlb_unmap_single and
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* swiotlb_sync_single_*, to see if the memory was in fact allocated by this
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* API.
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*/
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static char *io_tlb_start, *io_tlb_end;
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/*
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* The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
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* io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
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*/
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static unsigned long io_tlb_nslabs;
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/*
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* When the IOMMU overflows we return a fallback buffer. This sets the size.
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*/
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static unsigned long io_tlb_overflow = 32*1024;
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void *io_tlb_overflow_buffer;
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/*
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* This is a free list describing the number of free entries available from
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* each index
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*/
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static unsigned int *io_tlb_list;
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static unsigned int io_tlb_index;
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/*
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* We need to save away the original address corresponding to a mapped entry
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* for the sync operations.
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*/
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static unsigned char **io_tlb_orig_addr;
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/*
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* Protect the above data structures in the map and unmap calls
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*/
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static DEFINE_SPINLOCK(io_tlb_lock);
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static int __init
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setup_io_tlb_npages(char *str)
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{
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if (isdigit(*str)) {
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io_tlb_nslabs = simple_strtoul(str, &str, 0);
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/* avoid tail segment of size < IO_TLB_SEGSIZE */
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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if (*str == ',')
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++str;
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if (!strcmp(str, "force"))
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swiotlb_force = 1;
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return 1;
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}
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__setup("swiotlb=", setup_io_tlb_npages);
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/* make io_tlb_overflow tunable too? */
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/*
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* Statically reserve bounce buffer space and initialize bounce buffer data
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* structures for the software IO TLB used to implement the DMA API.
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*/
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void __init
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swiotlb_init_with_default_size(size_t default_size)
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{
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unsigned long i, bytes;
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if (!io_tlb_nslabs) {
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io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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/*
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* Get IO TLB memory from the low pages
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*/
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io_tlb_start = alloc_bootmem_low_pages(bytes);
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if (!io_tlb_start)
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panic("Cannot allocate SWIOTLB buffer");
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io_tlb_end = io_tlb_start + bytes;
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/*
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* Allocate and initialize the free list array. This array is used
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* to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
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* between io_tlb_start and io_tlb_end.
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*/
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io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
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for (i = 0; i < io_tlb_nslabs; i++)
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io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
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io_tlb_index = 0;
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io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
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/*
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* Get the overflow emergency buffer
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*/
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io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
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if (!io_tlb_overflow_buffer)
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panic("Cannot allocate SWIOTLB overflow buffer!\n");
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printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
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virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
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}
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void __init
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swiotlb_init(void)
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{
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swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
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}
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/*
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* Systems with larger DMA zones (those that don't support ISA) can
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* initialize the swiotlb later using the slab allocator if needed.
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* This should be just like above, but with some error catching.
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*/
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int
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swiotlb_late_init_with_default_size(size_t default_size)
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{
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unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
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unsigned int order;
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if (!io_tlb_nslabs) {
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io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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/*
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* Get IO TLB memory from the low pages
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*/
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order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
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io_tlb_nslabs = SLABS_PER_PAGE << order;
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
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io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
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order);
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if (io_tlb_start)
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break;
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order--;
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}
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if (!io_tlb_start)
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goto cleanup1;
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if (order != get_order(bytes)) {
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printk(KERN_WARNING "Warning: only able to allocate %ld MB "
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"for software IO TLB\n", (PAGE_SIZE << order) >> 20);
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io_tlb_nslabs = SLABS_PER_PAGE << order;
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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}
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io_tlb_end = io_tlb_start + bytes;
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memset(io_tlb_start, 0, bytes);
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/*
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* Allocate and initialize the free list array. This array is used
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* to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
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* between io_tlb_start and io_tlb_end.
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*/
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io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
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get_order(io_tlb_nslabs * sizeof(int)));
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if (!io_tlb_list)
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goto cleanup2;
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for (i = 0; i < io_tlb_nslabs; i++)
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io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
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io_tlb_index = 0;
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io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
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get_order(io_tlb_nslabs * sizeof(char *)));
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if (!io_tlb_orig_addr)
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goto cleanup3;
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memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
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/*
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* Get the overflow emergency buffer
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*/
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io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
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get_order(io_tlb_overflow));
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if (!io_tlb_overflow_buffer)
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goto cleanup4;
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printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
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"0x%lx\n", bytes >> 20,
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virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
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return 0;
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cleanup4:
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free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
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sizeof(char *)));
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io_tlb_orig_addr = NULL;
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cleanup3:
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free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
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sizeof(int)));
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io_tlb_list = NULL;
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cleanup2:
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io_tlb_end = NULL;
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free_pages((unsigned long)io_tlb_start, order);
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io_tlb_start = NULL;
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cleanup1:
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io_tlb_nslabs = req_nslabs;
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return -ENOMEM;
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}
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static int
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address_needs_mapping(struct device *hwdev, dma_addr_t addr)
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{
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dma_addr_t mask = 0xffffffff;
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/* If the device has a mask, use it, otherwise default to 32 bits */
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if (hwdev && hwdev->dma_mask)
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mask = *hwdev->dma_mask;
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return (addr & ~mask) != 0;
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}
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/*
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* Allocates bounce buffer and returns its kernel virtual address.
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*/
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static void *
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map_single(struct device *hwdev, char *buffer, size_t size, int dir)
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{
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unsigned long flags;
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char *dma_addr;
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unsigned int nslots, stride, index, wrap;
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int i;
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/*
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* For mappings greater than a page, we limit the stride (and
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* hence alignment) to a page size.
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*/
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nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
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if (size > PAGE_SIZE)
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stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
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else
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stride = 1;
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BUG_ON(!nslots);
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/*
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* Find suitable number of IO TLB entries size that will fit this
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* request and allocate a buffer from that IO TLB pool.
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*/
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spin_lock_irqsave(&io_tlb_lock, flags);
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{
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wrap = index = ALIGN(io_tlb_index, stride);
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if (index >= io_tlb_nslabs)
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wrap = index = 0;
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do {
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/*
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* If we find a slot that indicates we have 'nslots'
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* number of contiguous buffers, we allocate the
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* buffers from that slot and mark the entries as '0'
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* indicating unavailable.
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*/
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if (io_tlb_list[index] >= nslots) {
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int count = 0;
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for (i = index; i < (int) (index + nslots); i++)
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io_tlb_list[i] = 0;
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for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
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io_tlb_list[i] = ++count;
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dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
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/*
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* Update the indices to avoid searching in
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* the next round.
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*/
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io_tlb_index = ((index + nslots) < io_tlb_nslabs
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? (index + nslots) : 0);
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goto found;
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}
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index += stride;
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if (index >= io_tlb_nslabs)
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index = 0;
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} while (index != wrap);
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spin_unlock_irqrestore(&io_tlb_lock, flags);
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return NULL;
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}
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found:
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spin_unlock_irqrestore(&io_tlb_lock, flags);
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/*
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* Save away the mapping from the original address to the DMA address.
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* This is needed when we sync the memory. Then we sync the buffer if
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* needed.
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*/
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for (i = 0; i < nslots; i++)
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io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
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if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
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memcpy(dma_addr, buffer, size);
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return dma_addr;
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}
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/*
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* dma_addr is the kernel virtual address of the bounce buffer to unmap.
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*/
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static void
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unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
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{
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unsigned long flags;
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int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
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int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
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char *buffer = io_tlb_orig_addr[index];
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/*
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* First, sync the memory before unmapping the entry
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*/
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if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
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/*
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* bounce... copy the data back into the original buffer * and
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* delete the bounce buffer.
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*/
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memcpy(buffer, dma_addr, size);
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/*
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* Return the buffer to the free list by setting the corresponding
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* entries to indicate the number of contigous entries available.
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* While returning the entries to the free list, we merge the entries
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* with slots below and above the pool being returned.
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*/
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spin_lock_irqsave(&io_tlb_lock, flags);
|
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{
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count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
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io_tlb_list[index + nslots] : 0);
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/*
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* Step 1: return the slots to the free list, merging the
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* slots with superceeding slots
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*/
|
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for (i = index + nslots - 1; i >= index; i--)
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io_tlb_list[i] = ++count;
|
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/*
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* Step 2: merge the returned slots with the preceding slots,
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* if available (non zero)
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*/
|
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for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
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io_tlb_list[i] = ++count;
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}
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spin_unlock_irqrestore(&io_tlb_lock, flags);
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}
|
|
|
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static void
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sync_single(struct device *hwdev, char *dma_addr, size_t size,
|
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int dir, int target)
|
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{
|
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int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
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char *buffer = io_tlb_orig_addr[index];
|
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|
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buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
|
|
|
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switch (target) {
|
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case SYNC_FOR_CPU:
|
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if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
|
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memcpy(buffer, dma_addr, size);
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else
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BUG_ON(dir != DMA_TO_DEVICE);
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break;
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case SYNC_FOR_DEVICE:
|
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if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
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memcpy(dma_addr, buffer, size);
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else
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BUG_ON(dir != DMA_FROM_DEVICE);
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break;
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default:
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BUG();
|
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}
|
|
}
|
|
|
|
void *
|
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swiotlb_alloc_coherent(struct device *hwdev, size_t size,
|
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dma_addr_t *dma_handle, gfp_t flags)
|
|
{
|
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dma_addr_t dev_addr;
|
|
void *ret;
|
|
int order = get_order(size);
|
|
|
|
/*
|
|
* XXX fix me: the DMA API should pass us an explicit DMA mask
|
|
* instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
|
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* bit range instead of a 16MB one).
|
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*/
|
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flags |= GFP_DMA;
|
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|
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ret = (void *)__get_free_pages(flags, order);
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if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
|
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/*
|
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* The allocated memory isn't reachable by the device.
|
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* Fall back on swiotlb_map_single().
|
|
*/
|
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free_pages((unsigned long) ret, order);
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ret = NULL;
|
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}
|
|
if (!ret) {
|
|
/*
|
|
* We are either out of memory or the device can't DMA
|
|
* to GFP_DMA memory; fall back on
|
|
* swiotlb_map_single(), which will grab memory from
|
|
* the lowest available address range.
|
|
*/
|
|
dma_addr_t handle;
|
|
handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
|
|
if (swiotlb_dma_mapping_error(handle))
|
|
return NULL;
|
|
|
|
ret = bus_to_virt(handle);
|
|
}
|
|
|
|
memset(ret, 0, size);
|
|
dev_addr = virt_to_bus(ret);
|
|
|
|
/* Confirm address can be DMA'd by device */
|
|
if (address_needs_mapping(hwdev, dev_addr)) {
|
|
printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
|
|
(unsigned long long)*hwdev->dma_mask,
|
|
(unsigned long long)dev_addr);
|
|
panic("swiotlb_alloc_coherent: allocated memory is out of "
|
|
"range for device");
|
|
}
|
|
*dma_handle = dev_addr;
|
|
return ret;
|
|
}
|
|
|
|
void
|
|
swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
|
|
dma_addr_t dma_handle)
|
|
{
|
|
WARN_ON(irqs_disabled());
|
|
if (!(vaddr >= (void *)io_tlb_start
|
|
&& vaddr < (void *)io_tlb_end))
|
|
free_pages((unsigned long) vaddr, get_order(size));
|
|
else
|
|
/* DMA_TO_DEVICE to avoid memcpy in unmap_single */
|
|
swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
|
|
}
|
|
|
|
static void
|
|
swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
|
|
{
|
|
/*
|
|
* Ran out of IOMMU space for this operation. This is very bad.
|
|
* Unfortunately the drivers cannot handle this operation properly.
|
|
* unless they check for dma_mapping_error (most don't)
|
|
* When the mapping is small enough return a static buffer to limit
|
|
* the damage, or panic when the transfer is too big.
|
|
*/
|
|
printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
|
|
"device %s\n", size, dev ? dev->bus_id : "?");
|
|
|
|
if (size > io_tlb_overflow && do_panic) {
|
|
if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
|
|
panic("DMA: Memory would be corrupted\n");
|
|
if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
|
|
panic("DMA: Random memory would be DMAed\n");
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Map a single buffer of the indicated size for DMA in streaming mode. The
|
|
* physical address to use is returned.
|
|
*
|
|
* Once the device is given the dma address, the device owns this memory until
|
|
* either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
|
|
*/
|
|
dma_addr_t
|
|
swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
|
|
{
|
|
dma_addr_t dev_addr = virt_to_bus(ptr);
|
|
void *map;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
/*
|
|
* If the pointer passed in happens to be in the device's DMA window,
|
|
* we can safely return the device addr and not worry about bounce
|
|
* buffering it.
|
|
*/
|
|
if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
|
|
return dev_addr;
|
|
|
|
/*
|
|
* Oh well, have to allocate and map a bounce buffer.
|
|
*/
|
|
map = map_single(hwdev, ptr, size, dir);
|
|
if (!map) {
|
|
swiotlb_full(hwdev, size, dir, 1);
|
|
map = io_tlb_overflow_buffer;
|
|
}
|
|
|
|
dev_addr = virt_to_bus(map);
|
|
|
|
/*
|
|
* Ensure that the address returned is DMA'ble
|
|
*/
|
|
if (address_needs_mapping(hwdev, dev_addr))
|
|
panic("map_single: bounce buffer is not DMA'ble");
|
|
|
|
return dev_addr;
|
|
}
|
|
|
|
/*
|
|
* Unmap a single streaming mode DMA translation. The dma_addr and size must
|
|
* match what was provided for in a previous swiotlb_map_single call. All
|
|
* other usages are undefined.
|
|
*
|
|
* After this call, reads by the cpu to the buffer are guaranteed to see
|
|
* whatever the device wrote there.
|
|
*/
|
|
void
|
|
swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
|
|
int dir)
|
|
{
|
|
char *dma_addr = bus_to_virt(dev_addr);
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
|
|
unmap_single(hwdev, dma_addr, size, dir);
|
|
else if (dir == DMA_FROM_DEVICE)
|
|
dma_mark_clean(dma_addr, size);
|
|
}
|
|
|
|
/*
|
|
* Make physical memory consistent for a single streaming mode DMA translation
|
|
* after a transfer.
|
|
*
|
|
* If you perform a swiotlb_map_single() but wish to interrogate the buffer
|
|
* using the cpu, yet do not wish to teardown the dma mapping, you must
|
|
* call this function before doing so. At the next point you give the dma
|
|
* address back to the card, you must first perform a
|
|
* swiotlb_dma_sync_for_device, and then the device again owns the buffer
|
|
*/
|
|
static void
|
|
swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, int dir, int target)
|
|
{
|
|
char *dma_addr = bus_to_virt(dev_addr);
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
|
|
sync_single(hwdev, dma_addr, size, dir, target);
|
|
else if (dir == DMA_FROM_DEVICE)
|
|
dma_mark_clean(dma_addr, size);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, int dir)
|
|
{
|
|
swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, int dir)
|
|
{
|
|
swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
|
|
}
|
|
|
|
/*
|
|
* Same as above, but for a sub-range of the mapping.
|
|
*/
|
|
static void
|
|
swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
|
|
unsigned long offset, size_t size,
|
|
int dir, int target)
|
|
{
|
|
char *dma_addr = bus_to_virt(dev_addr) + offset;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
|
|
sync_single(hwdev, dma_addr, size, dir, target);
|
|
else if (dir == DMA_FROM_DEVICE)
|
|
dma_mark_clean(dma_addr, size);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
|
|
unsigned long offset, size_t size, int dir)
|
|
{
|
|
swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
|
|
SYNC_FOR_CPU);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
|
|
unsigned long offset, size_t size, int dir)
|
|
{
|
|
swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
|
|
SYNC_FOR_DEVICE);
|
|
}
|
|
|
|
/*
|
|
* Map a set of buffers described by scatterlist in streaming mode for DMA.
|
|
* This is the scatter-gather version of the above swiotlb_map_single
|
|
* interface. Here the scatter gather list elements are each tagged with the
|
|
* appropriate dma address and length. They are obtained via
|
|
* sg_dma_{address,length}(SG).
|
|
*
|
|
* NOTE: An implementation may be able to use a smaller number of
|
|
* DMA address/length pairs than there are SG table elements.
|
|
* (for example via virtual mapping capabilities)
|
|
* The routine returns the number of addr/length pairs actually
|
|
* used, at most nents.
|
|
*
|
|
* Device ownership issues as mentioned above for swiotlb_map_single are the
|
|
* same here.
|
|
*/
|
|
int
|
|
swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
|
|
int dir)
|
|
{
|
|
void *addr;
|
|
dma_addr_t dev_addr;
|
|
int i;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
for (i = 0; i < nelems; i++, sg++) {
|
|
addr = SG_ENT_VIRT_ADDRESS(sg);
|
|
dev_addr = virt_to_bus(addr);
|
|
if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
|
|
void *map = map_single(hwdev, addr, sg->length, dir);
|
|
if (!map) {
|
|
/* Don't panic here, we expect map_sg users
|
|
to do proper error handling. */
|
|
swiotlb_full(hwdev, sg->length, dir, 0);
|
|
swiotlb_unmap_sg(hwdev, sg - i, i, dir);
|
|
sg[0].dma_length = 0;
|
|
return 0;
|
|
}
|
|
sg->dma_address = virt_to_bus(map);
|
|
} else
|
|
sg->dma_address = dev_addr;
|
|
sg->dma_length = sg->length;
|
|
}
|
|
return nelems;
|
|
}
|
|
|
|
/*
|
|
* Unmap a set of streaming mode DMA translations. Again, cpu read rules
|
|
* concerning calls here are the same as for swiotlb_unmap_single() above.
|
|
*/
|
|
void
|
|
swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
|
|
int dir)
|
|
{
|
|
int i;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
for (i = 0; i < nelems; i++, sg++)
|
|
if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
|
|
unmap_single(hwdev, bus_to_virt(sg->dma_address),
|
|
sg->dma_length, dir);
|
|
else if (dir == DMA_FROM_DEVICE)
|
|
dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
|
|
}
|
|
|
|
/*
|
|
* Make physical memory consistent for a set of streaming mode DMA translations
|
|
* after a transfer.
|
|
*
|
|
* The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
|
|
* and usage.
|
|
*/
|
|
static void
|
|
swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, int dir, int target)
|
|
{
|
|
int i;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
for (i = 0; i < nelems; i++, sg++)
|
|
if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
|
|
sync_single(hwdev, bus_to_virt(sg->dma_address),
|
|
sg->dma_length, dir, target);
|
|
else if (dir == DMA_FROM_DEVICE)
|
|
dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, int dir)
|
|
{
|
|
swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, int dir)
|
|
{
|
|
swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
|
|
}
|
|
|
|
int
|
|
swiotlb_dma_mapping_error(dma_addr_t dma_addr)
|
|
{
|
|
return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
|
|
}
|
|
|
|
/*
|
|
* Return whether the given device DMA address mask can be supported
|
|
* properly. For example, if your device can only drive the low 24-bits
|
|
* during bus mastering, then you would pass 0x00ffffff as the mask to
|
|
* this function.
|
|
*/
|
|
int
|
|
swiotlb_dma_supported(struct device *hwdev, u64 mask)
|
|
{
|
|
return virt_to_bus(io_tlb_end - 1) <= mask;
|
|
}
|
|
|
|
EXPORT_SYMBOL(swiotlb_map_single);
|
|
EXPORT_SYMBOL(swiotlb_unmap_single);
|
|
EXPORT_SYMBOL(swiotlb_map_sg);
|
|
EXPORT_SYMBOL(swiotlb_unmap_sg);
|
|
EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
|
|
EXPORT_SYMBOL(swiotlb_sync_single_for_device);
|
|
EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
|
|
EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
|
|
EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
|
|
EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
|
|
EXPORT_SYMBOL(swiotlb_dma_mapping_error);
|
|
EXPORT_SYMBOL(swiotlb_alloc_coherent);
|
|
EXPORT_SYMBOL(swiotlb_free_coherent);
|
|
EXPORT_SYMBOL(swiotlb_dma_supported);
|