9879a3814b
For NFP, we want to re-group a sequence of load/store pairs lowered from
memcpy/memmove into single memory bulk operation which then could be
accelerated using NFP CPP bus.
This patch extends the existing load/store auxiliary information by adding
two new fields:
struct bpf_insn *paired_st;
s16 ldst_gather_len;
Both fields are supposed to be carried by the the load instruction at the
head of the sequence. "paired_st" is the corresponding store instruction at
the head and "ldst_gather_len" is the gathered length.
If "ldst_gather_len" is negative, then the sequence is doing memory
load/store in descending order, otherwise it is in ascending order. We need
this information to detect overlapped memory access.
This patch then optimize memory bulk copy when the copy length is within
32-bytes.
The strategy of read/write used is:
* Read.
Use read32 (direct_ref), always.
* Write.
- length <= 8-bytes
write8 (direct_ref).
- length <= 32-bytes and is 4-byte aligned
write32 (direct_ref).
- length <= 32-bytes but is not 4-byte aligned
write8 (indirect_ref).
NOTE: the optimization should not change program semantics. The destination
register of the last load instruction should contain the same value before
and after this optimization.
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
261 lines
6.7 KiB
C
261 lines
6.7 KiB
C
/*
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* Copyright (C) 2016-2017 Netronome Systems, Inc.
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*
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* This software is dual licensed under the GNU General License Version 2,
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* June 1991 as shown in the file COPYING in the top-level directory of this
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* source tree or the BSD 2-Clause License provided below. You have the
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* option to license this software under the complete terms of either license.
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*
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* The BSD 2-Clause License:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* 1. Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include "nfp_asm.h"
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const struct cmd_tgt_act cmd_tgt_act[__CMD_TGT_MAP_SIZE] = {
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[CMD_TGT_WRITE8_SWAP] = { 0x02, 0x42 },
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[CMD_TGT_WRITE32_SWAP] = { 0x02, 0x5f },
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[CMD_TGT_READ8] = { 0x01, 0x43 },
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[CMD_TGT_READ32] = { 0x00, 0x5c },
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[CMD_TGT_READ32_LE] = { 0x01, 0x5c },
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[CMD_TGT_READ32_SWAP] = { 0x02, 0x5c },
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[CMD_TGT_READ_LE] = { 0x01, 0x40 },
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[CMD_TGT_READ_SWAP_LE] = { 0x03, 0x40 },
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};
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static u16 nfp_swreg_to_unreg(swreg reg, bool is_dst)
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{
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bool lm_id, lm_dec = false;
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u16 val = swreg_value(reg);
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switch (swreg_type(reg)) {
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case NN_REG_GPR_A:
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case NN_REG_GPR_B:
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case NN_REG_GPR_BOTH:
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return val;
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case NN_REG_NNR:
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return UR_REG_NN | val;
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case NN_REG_XFER:
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return UR_REG_XFR | val;
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case NN_REG_LMEM:
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lm_id = swreg_lm_idx(reg);
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switch (swreg_lm_mode(reg)) {
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case NN_LM_MOD_NONE:
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if (val & ~UR_REG_LM_IDX_MAX) {
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pr_err("LM offset too large\n");
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return 0;
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}
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return UR_REG_LM | FIELD_PREP(UR_REG_LM_IDX, lm_id) |
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val;
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case NN_LM_MOD_DEC:
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lm_dec = true;
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/* fall through */
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case NN_LM_MOD_INC:
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if (val) {
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pr_err("LM offset in inc/dev mode\n");
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return 0;
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}
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return UR_REG_LM | UR_REG_LM_POST_MOD |
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FIELD_PREP(UR_REG_LM_IDX, lm_id) |
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FIELD_PREP(UR_REG_LM_POST_MOD_DEC, lm_dec);
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default:
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pr_err("bad LM mode for unrestricted operands %d\n",
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swreg_lm_mode(reg));
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return 0;
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}
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case NN_REG_IMM:
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if (val & ~0xff) {
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pr_err("immediate too large\n");
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return 0;
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}
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return UR_REG_IMM_encode(val);
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case NN_REG_NONE:
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return is_dst ? UR_REG_NO_DST : REG_NONE;
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}
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pr_err("unrecognized reg encoding %08x\n", reg);
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return 0;
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}
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int swreg_to_unrestricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_ur_regs *reg)
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{
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memset(reg, 0, sizeof(*reg));
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/* Decode destination */
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if (swreg_type(dst) == NN_REG_IMM)
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return -EFAULT;
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if (swreg_type(dst) == NN_REG_GPR_B)
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reg->dst_ab = ALU_DST_B;
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if (swreg_type(dst) == NN_REG_GPR_BOTH)
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reg->wr_both = true;
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reg->dst = nfp_swreg_to_unreg(dst, true);
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/* Decode source operands */
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if (swreg_type(lreg) == swreg_type(rreg) &&
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swreg_type(lreg) != NN_REG_NONE)
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return -EFAULT;
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if (swreg_type(lreg) == NN_REG_GPR_B ||
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swreg_type(rreg) == NN_REG_GPR_A) {
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reg->areg = nfp_swreg_to_unreg(rreg, false);
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reg->breg = nfp_swreg_to_unreg(lreg, false);
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reg->swap = true;
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} else {
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reg->areg = nfp_swreg_to_unreg(lreg, false);
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reg->breg = nfp_swreg_to_unreg(rreg, false);
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}
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reg->dst_lmextn = swreg_lmextn(dst);
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reg->src_lmextn = swreg_lmextn(lreg) | swreg_lmextn(rreg);
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return 0;
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}
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static u16 nfp_swreg_to_rereg(swreg reg, bool is_dst, bool has_imm8, bool *i8)
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{
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u16 val = swreg_value(reg);
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bool lm_id;
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switch (swreg_type(reg)) {
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case NN_REG_GPR_A:
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case NN_REG_GPR_B:
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case NN_REG_GPR_BOTH:
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return val;
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case NN_REG_XFER:
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return RE_REG_XFR | val;
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case NN_REG_LMEM:
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lm_id = swreg_lm_idx(reg);
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if (swreg_lm_mode(reg) != NN_LM_MOD_NONE) {
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pr_err("bad LM mode for restricted operands %d\n",
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swreg_lm_mode(reg));
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return 0;
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}
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if (val & ~RE_REG_LM_IDX_MAX) {
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pr_err("LM offset too large\n");
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return 0;
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}
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return RE_REG_LM | FIELD_PREP(RE_REG_LM_IDX, lm_id) | val;
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case NN_REG_IMM:
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if (val & ~(0x7f | has_imm8 << 7)) {
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pr_err("immediate too large\n");
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return 0;
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}
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*i8 = val & 0x80;
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return RE_REG_IMM_encode(val & 0x7f);
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case NN_REG_NONE:
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return is_dst ? RE_REG_NO_DST : REG_NONE;
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case NN_REG_NNR:
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pr_err("NNRs used with restricted encoding\n");
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return 0;
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}
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pr_err("unrecognized reg encoding\n");
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return 0;
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}
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int swreg_to_restricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_re_regs *reg, bool has_imm8)
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{
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memset(reg, 0, sizeof(*reg));
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/* Decode destination */
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if (swreg_type(dst) == NN_REG_IMM)
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return -EFAULT;
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if (swreg_type(dst) == NN_REG_GPR_B)
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reg->dst_ab = ALU_DST_B;
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if (swreg_type(dst) == NN_REG_GPR_BOTH)
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reg->wr_both = true;
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reg->dst = nfp_swreg_to_rereg(dst, true, false, NULL);
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/* Decode source operands */
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if (swreg_type(lreg) == swreg_type(rreg) &&
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swreg_type(lreg) != NN_REG_NONE)
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return -EFAULT;
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if (swreg_type(lreg) == NN_REG_GPR_B ||
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swreg_type(rreg) == NN_REG_GPR_A) {
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reg->areg = nfp_swreg_to_rereg(rreg, false, has_imm8, ®->i8);
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reg->breg = nfp_swreg_to_rereg(lreg, false, has_imm8, ®->i8);
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reg->swap = true;
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} else {
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reg->areg = nfp_swreg_to_rereg(lreg, false, has_imm8, ®->i8);
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reg->breg = nfp_swreg_to_rereg(rreg, false, has_imm8, ®->i8);
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}
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reg->dst_lmextn = swreg_lmextn(dst);
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reg->src_lmextn = swreg_lmextn(lreg) | swreg_lmextn(rreg);
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return 0;
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}
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#define NFP_USTORE_ECC_POLY_WORDS 7
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#define NFP_USTORE_OP_BITS 45
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static const u64 nfp_ustore_ecc_polynomials[NFP_USTORE_ECC_POLY_WORDS] = {
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0x0ff800007fffULL,
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0x11f801ff801fULL,
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0x1e387e0781e1ULL,
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0x17cb8e388e22ULL,
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0x1af5b2c93244ULL,
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0x1f56d5525488ULL,
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0x0daf69a46910ULL,
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};
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static bool parity(u64 value)
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{
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return hweight64(value) & 1;
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}
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int nfp_ustore_check_valid_no_ecc(u64 insn)
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{
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if (insn & ~GENMASK_ULL(NFP_USTORE_OP_BITS, 0))
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return -EINVAL;
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return 0;
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}
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u64 nfp_ustore_calc_ecc_insn(u64 insn)
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{
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u8 ecc = 0;
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int i;
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for (i = 0; i < NFP_USTORE_ECC_POLY_WORDS; i++)
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ecc |= parity(nfp_ustore_ecc_polynomials[i] & insn) << i;
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return insn | (u64)ecc << NFP_USTORE_OP_BITS;
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}
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