Colin Ian King 0b3a8738b7 perf/x86/intel/uncore: Fix integer overflow on 23 bit left shift of a u32 ... The u32 variable pci_dword is being masked with 0x1fffffff and then left shifted 23 places. The shift is a u32 operation,so a value of 0x200 or more in pci_dword will overflow the u32 and only the bottow 32 bits are assigned to addr. I don't believe this was the original intent. Fix this by casting pci_dword to a resource_size_t to ensure no overflow occurs. Note that the mask and 12 bit left shift operation does not need this because the mask SNR_IMC_MMIO_MEM0_MASK and shift is always a 32 bit value. Fixes: ee49532b38 ("perf/x86/intel/uncore: Add IMC uncore support for Snow Ridge") Addresses-Coverity: ("Unintentional integer overflow") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Link: https://lore.kernel.org/r/20210706114553.28249-1-colin.king@canonical.com		2021-08-26 08:58:02 +02:00
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amd	Handle power-gating of AMD IOMMU perf counters properly when they are used.	2021-05-09 13:00:26 -07:00
intel	perf/x86/intel/uncore: Fix integer overflow on 23 bit left shift of a u32	2021-08-26 08:58:02 +02:00
zhaoxin
core.c	perf/x86: Fix out of bound MSR access	2021-08-04 15:16:33 +02:00
Kconfig
Makefile
msr.c	perf/x86/msr: Add Alder Lake CPU support	2021-04-19 20:03:29 +02:00
perf_event.h	perf/x86/intel: Apply mid ACK for small core	2021-08-06 14:25:15 +02:00
probe.c
probe.h
rapl.c	perf/x86/rapl: Use CPUID bit on AMD and Hygon parts	2021-06-01 21:10:33 +02:00