Eric Bernstein 0b126112e9 drm/amd/display: DP YCbCr 4:2:0 support ... Update MSA MISC1 bit 6 programming to handle YCbCr 4:2:0 and BT2020 cases. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-06-15 12:20:27 -05:00
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drm	drm/amd/display: DP YCbCr 4:2:0 support	2018-06-15 12:20:27 -05:00
host1x	gpu: host1x: Use not explicitly sized types	2018-05-18 21:51:37 +02:00
ipu-v3	gpu: ipu-v3: prg: avoid possible array underflow	2018-03-15 17:52:08 +01:00
vga	vga_switcheroo: Let HDA autosuspend on mux change	2018-03-13 22:58:49 +01:00
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