forked from Minki/linux
0a8e73301d
1. Few cleanups. 2. Add debug statistics to Tegra20 memory controller. 3. Update bindings and convert to dtschema. This update is not backwards compatible (ABI break) however the broken part was added recently (v5.11) and there are no users of it yet. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmBt2ZcQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD12sfEACQYS2TjPwHXmo9hv+fKoYAq4qQ/NOL7YAY pN1k42RsDa28/KwoToFkD2WFNpDppSVHVQYjLMjBhjwh7A2x8DOFufm4kOVuhOxI u9BAo8iasKh+gmrdLgHcWNXkm881V4mFwSYR+FLQCvrF+1O+CFc1xJ3l9CMMKAvI ukJBwriJ2HFWnWXiv0xRTJkjhO8/hK+AuGHLeU0EhskFUIYhaPOm8lQ75KLx6axU LFh5lv56zPZcXihWKU1Au3S4Wxb/FEmqkL5HVgqkNEaZYRZH8JhIR2cV5iUukA2o ZdWPXaSNtHn7vXAXI+VjRj10+l+qYqktSXv9ukOmd/ofQN6aYDzb0HdPM/QBw/Kz VNSK2bPe912oN8a9nD2rePqS/Ny8+AZz0mLkmUbVmhJWuD483pLHZAhK1zyl2Toe Zj5l4hSFTUwjr4UBLBlKZmBmz3sYyYUT9k/PDYU+AX52uUPLAdC0piyoEVKZxVDB P3XUdAZlhde/BKwVpyBNCDoWgD4SEJfSw7BOYbfVvIyaOBqxh8foMX1C+xCfaxW2 /dYCDtdjfqSWr2rwiNNtgA8XqiFKeJwthez6xsUHvI7qxPHRRhFCZlLUk0EK9X5h hPyESPu01BuXzjp4w4rIX3K4t2ikBDXXOqrdlRr/8C2/Xzk6XQ4VOk/pqFk47hWk oJJ3Jg+Nfw== =bbW2 -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-tegra-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.13 - Tegra SoC 1. Few cleanups. 2. Add debug statistics to Tegra20 memory controller. 3. Update bindings and convert to dtschema. This update is not backwards compatible (ABI break) however the broken part was added recently (v5.11) and there are no users of it yet. * tag 'memory-controller-drv-tegra-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: memory: tegra20: mc: Convert to schema dt-bindings: memory: tegra124: emc: Replace core regulator with power domain dt-bindings: memory: tegra30: emc: Replace core regulator with power domain dt-bindings: memory: tegra20: emc: Replace core regulator with power domain memory: tegra: Print out info-level once per driver probe memory: tegra20: Protect debug code with a lock memory: tegra20: Correct comment to MC_STAT registers writes memory: tegra20: Add debug statistics memory: tegra: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE Link: https://lore.kernel.org/r/20210407161333.73013-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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arc | ||
at91 | ||
bcm2835 | ||
canaan | ||
fsl | ||
imx | ||
mediatek | ||
mscc | ||
qcom | ||
rockchip | ||
sa1100 | ||
sifive | ||
tegra |