forked from Minki/linux
3277e8aa25
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to enable straightforward passing of work between a producer and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs. The RINGACC converts constant-address read and write accesses to equivalent read or write accesses to a circular data structure in memory. The RINGACC eliminates the need for each DMA controller which needs to access ring elements from having to know the current state of the ring (base address, current offset). The DMA controller performs a read or write access to a specific address range (which maps to the source interface on the RINGACC) and the RINGACC replaces the address for the transaction with a new address which corresponds to the head or tail element of the ring (head for reads, tail for writes). Since the RINGACC maintains the state, multiple DMA controllers or channels are allowed to coherently share the same rings as applicable. The RINGACC is able to place data which is destined towards software into cached memory directly. Supported ring modes: - Ring Mode - Messaging Mode - Credentials Mode - Queue Manager Mode TI-SCI integration: Texas Instrument's System Control Interface (TI-SCI) Message Protocol now has control over Ringacc module resources management (RM) and Rings configuration. The corresponding support of TI-SCI Ringacc module RM protocol introduced as option through DT parameters: - ti,sci: phandle on TI-SCI firmware controller DT node - ti,sci-dev-id: TI-SCI device identifier as per TI-SCI firmware spec if both parameters present - Ringacc driver will configure/free/reset Rings using TI-SCI Message Ringacc RM Protocol. The Ringacc driver manages Rings allocation by itself now and requests TI-SCI firmware to allocate and configure specific Rings only. It's done this way because, Linux driver implements two stage Rings allocation and configuration (allocate ring and configure ring) while TI-SCI Message Protocol supports only one combined operation (allocate+configure). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Tero Kristo <t-kristo@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
101 lines
2.8 KiB
Plaintext
101 lines
2.8 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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# 64-bit ARM SoCs from TI
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if ARM64
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if ARCH_K3
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config ARCH_K3_AM6_SOC
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bool "K3 AM6 SoC"
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help
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Enable support for TI's AM6 SoC Family support
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config ARCH_K3_J721E_SOC
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bool "K3 J721E SoC"
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help
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Enable support for TI's J721E SoC Family support
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endif
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endif
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#
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# TI SOC drivers
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#
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menuconfig SOC_TI
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bool "TI SOC drivers support"
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if SOC_TI
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config KEYSTONE_NAVIGATOR_QMSS
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tristate "Keystone Queue Manager Sub System"
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depends on ARCH_KEYSTONE
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help
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Say y here to support the Keystone multicore Navigator Queue
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Manager support. The Queue Manager is a hardware module that
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is responsible for accelerating management of the packet queues.
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Packets are queued/de-queued by writing/reading descriptor address
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to a particular memory mapped location in the Queue Manager module.
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If unsure, say N.
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config KEYSTONE_NAVIGATOR_DMA
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tristate "TI Keystone Navigator Packet DMA support"
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depends on ARCH_KEYSTONE
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help
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Say y tp enable support for the Keystone Navigator Packet DMA on
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on Keystone family of devices. It sets up the dma channels for the
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Queue Manager Sub System.
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If unsure, say N.
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config AMX3_PM
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tristate "AMx3 Power Management"
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depends on SOC_AM33XX || SOC_AM43XX
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depends on WKUP_M3_IPC && TI_EMIF_SRAM && SRAM && RTC_DRV_OMAP
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help
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Enable power management on AM335x and AM437x. Required for suspend to mem
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and standby states on both AM335x and AM437x platforms and for deeper cpuidle
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c-states on AM335x. Also required for rtc and ddr in self-refresh low
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power mode on AM437x platforms.
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config WKUP_M3_IPC
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tristate "TI AMx3 Wkup-M3 IPC Driver"
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depends on WKUP_M3_RPROC
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depends on OMAP2PLUS_MBOX
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help
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TI AM33XX and AM43XX have a Cortex M3, the Wakeup M3, to handle
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low power transitions. This IPC driver provides the necessary API
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to communicate and use the Wakeup M3 for PM features like suspend
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resume and boots it using wkup_m3_rproc driver.
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config TI_SCI_PM_DOMAINS
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tristate "TI SCI PM Domains Driver"
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depends on TI_SCI_PROTOCOL
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depends on PM_GENERIC_DOMAINS
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help
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Generic power domain implementation for TI device implementing
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the TI SCI protocol.
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To compile this as a module, choose M here. The module will be
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called ti_sci_pm_domains. Note this is needed early in boot before
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rootfs may be available.
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config TI_K3_RINGACC
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bool "K3 Ring accelerator Sub System"
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depends on ARCH_K3 || COMPILE_TEST
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depends on TI_SCI_INTA_IRQCHIP
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help
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Say y here to support the K3 Ring accelerator module.
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The Ring Accelerator (RINGACC or RA) provides hardware acceleration
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to enable straightforward passing of work between a producer
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and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs
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If unsure, say N.
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endif # SOC_TI
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config TI_SCI_INTA_MSI_DOMAIN
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bool
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select GENERIC_MSI_IRQ_DOMAIN
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help
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Driver to enable Interrupt Aggregator specific MSI Domain.
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