forked from Minki/linux
0909c8c2d5
This patch reworks the feature fixup mecanism so vdso's can be fixed up.
The main issue was that the construct:
.long label (or .llong on 64 bits)
will not work in the case of a shared library like the vdso. It will
generate an empty placeholder in the fixup table along with a reloc,
which is not something we can deal with in the vdso.
The idea here (thanks Alan Modra !) is to instead use something like:
1:
.long label - 1b
That is, the feature fixup tables no longer contain addresses of bits of
code to patch, but offsets of such code from the fixup table entry
itself. That is properly resolved by ld when building the .so's. I've
modified the fixup mecanism generically to use that method for the rest
of the kernel as well.
Another trick is that the 32 bits vDSO included in the 64 bits kernel
need to have a table in the 64 bits format. However, gas does not
support 32 bits code with a statement of the form:
.llong label - 1b (Or even just .llong label)
That is, it cannot emit the right fixup/relocation for the linker to use
to assign a 32 bits address to an .llong field. Thus, in the specific
case of the 32 bits vdso built as part of the 64 bits kernel, we are
using a modified macro that generates:
.long 0xffffffff
.llong label - 1b
Note that is assumes that the value is negative which is enforced by
the .lds (those offsets are always negative as the .text is always
before the fixup table and gas doesn't support emiting the reloc the
other way around).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
1239 lines
34 KiB
C
1239 lines
34 KiB
C
/*
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* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
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*
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* Modifications for ppc64:
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* Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/string.h>
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#include <linux/sched.h>
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#include <linux/threads.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <asm/oprofile_impl.h>
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#include <asm/cputable.h>
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#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
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struct cpu_spec* cur_cpu_spec = NULL;
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EXPORT_SYMBOL(cur_cpu_spec);
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/* NOTE:
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* Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
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* the responsibility of the appropriate CPU save/restore functions to
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* eventually copy these settings over. Those save/restore aren't yet
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* part of the cputable though. That has to be fixed for both ppc32
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* and ppc64
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*/
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#ifdef CONFIG_PPC32
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_PPC64
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extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_ppc970(void);
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#endif /* CONFIG_PPC64 */
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
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* ones as well...
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*/
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#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
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PPC_FEATURE_HAS_MMU)
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#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
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#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
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#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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PPC_FEATURE_TRUE_LE)
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#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
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PPC_FEATURE_TRUE_LE | \
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PPC_FEATURE_HAS_ALTIVEC_COMP)
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#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
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PPC_FEATURE_BOOKE)
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/* We only set the spe features if the kernel was compiled with
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* spe support
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*/
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#ifdef CONFIG_SPE
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#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
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#else
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#define PPC_FEATURE_SPE_COMP 0
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#endif
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static struct cpu_spec cpu_specs[] = {
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#ifdef CONFIG_PPC64
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{ /* Power3 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00400000,
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.cpu_name = "POWER3 (630)",
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.cpu_features = CPU_FTRS_POWER3,
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.cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.oprofile_cpu_type = "ppc64/power3",
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.oprofile_type = PPC_OPROFILE_RS64,
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.platform = "power3",
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},
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{ /* Power3+ */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00410000,
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.cpu_name = "POWER3 (630+)",
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.cpu_features = CPU_FTRS_POWER3,
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.cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.oprofile_cpu_type = "ppc64/power3",
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.oprofile_type = PPC_OPROFILE_RS64,
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.platform = "power3",
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},
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{ /* Northstar */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00330000,
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.cpu_name = "RS64-II (northstar)",
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.cpu_features = CPU_FTRS_RS64,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.oprofile_cpu_type = "ppc64/rs64",
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.oprofile_type = PPC_OPROFILE_RS64,
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.platform = "rs64",
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},
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{ /* Pulsar */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00340000,
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.cpu_name = "RS64-III (pulsar)",
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.cpu_features = CPU_FTRS_RS64,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.oprofile_cpu_type = "ppc64/rs64",
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.oprofile_type = PPC_OPROFILE_RS64,
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.platform = "rs64",
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},
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{ /* I-star */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00360000,
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.cpu_name = "RS64-III (icestar)",
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.cpu_features = CPU_FTRS_RS64,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.oprofile_cpu_type = "ppc64/rs64",
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.oprofile_type = PPC_OPROFILE_RS64,
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.platform = "rs64",
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},
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{ /* S-star */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00370000,
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.cpu_name = "RS64-IV (sstar)",
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.cpu_features = CPU_FTRS_RS64,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.oprofile_cpu_type = "ppc64/rs64",
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.oprofile_type = PPC_OPROFILE_RS64,
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.platform = "rs64",
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},
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{ /* Power4 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00350000,
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.cpu_name = "POWER4 (gp)",
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.cpu_features = CPU_FTRS_POWER4,
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.cpu_user_features = COMMON_USER_POWER4,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.oprofile_cpu_type = "ppc64/power4",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "power4",
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},
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{ /* Power4+ */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00380000,
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.cpu_name = "POWER4+ (gq)",
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.cpu_features = CPU_FTRS_POWER4,
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.cpu_user_features = COMMON_USER_POWER4,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.oprofile_cpu_type = "ppc64/power4",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "power4",
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},
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{ /* PPC970 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00390000,
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.cpu_name = "PPC970",
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.cpu_features = CPU_FTRS_PPC970,
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.cpu_user_features = COMMON_USER_POWER4 |
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.cpu_setup = __setup_cpu_ppc970,
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.cpu_restore = __restore_cpu_ppc970,
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.oprofile_cpu_type = "ppc64/970",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "ppc970",
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},
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{ /* PPC970FX */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x003c0000,
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.cpu_name = "PPC970FX",
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.cpu_features = CPU_FTRS_PPC970,
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.cpu_user_features = COMMON_USER_POWER4 |
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.cpu_setup = __setup_cpu_ppc970,
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.cpu_restore = __restore_cpu_ppc970,
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.oprofile_cpu_type = "ppc64/970",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "ppc970",
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},
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{ /* PPC970MP */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00440000,
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.cpu_name = "PPC970MP",
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.cpu_features = CPU_FTRS_PPC970,
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.cpu_user_features = COMMON_USER_POWER4 |
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.cpu_setup = __setup_cpu_ppc970,
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.cpu_restore = __restore_cpu_ppc970,
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.oprofile_cpu_type = "ppc64/970",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "ppc970",
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},
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{ /* PPC970GX */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00450000,
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.cpu_name = "PPC970GX",
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.cpu_features = CPU_FTRS_PPC970,
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.cpu_user_features = COMMON_USER_POWER4 |
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.cpu_setup = __setup_cpu_ppc970,
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.oprofile_cpu_type = "ppc64/970",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "ppc970",
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},
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{ /* Power5 GR */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x003a0000,
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.cpu_name = "POWER5 (gr)",
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.cpu_features = CPU_FTRS_POWER5,
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.cpu_user_features = COMMON_USER_POWER5,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 6,
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.oprofile_cpu_type = "ppc64/power5",
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.oprofile_type = PPC_OPROFILE_POWER4,
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/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
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* and above but only works on POWER5 and above
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*/
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.oprofile_mmcra_sihv = MMCRA_SIHV,
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.oprofile_mmcra_sipr = MMCRA_SIPR,
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.platform = "power5",
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},
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{ /* Power5 GS */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x003b0000,
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.cpu_name = "POWER5+ (gs)",
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.cpu_features = CPU_FTRS_POWER5,
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.cpu_user_features = COMMON_USER_POWER5_PLUS,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 6,
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.oprofile_cpu_type = "ppc64/power5+",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.oprofile_mmcra_sihv = MMCRA_SIHV,
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.oprofile_mmcra_sipr = MMCRA_SIPR,
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.platform = "power5+",
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},
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{ /* Power6 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x003e0000,
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.cpu_name = "POWER6",
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.cpu_features = CPU_FTRS_POWER6,
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.cpu_user_features = COMMON_USER_POWER6,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 6,
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.oprofile_cpu_type = "ppc64/power6",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
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.oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
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.oprofile_mmcra_clear = POWER6_MMCRA_THRM |
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POWER6_MMCRA_OTHER,
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.platform = "power6",
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},
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{ /* Cell Broadband Engine */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00700000,
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.cpu_name = "Cell Broadband Engine",
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.cpu_features = CPU_FTRS_CELL,
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.cpu_user_features = COMMON_USER_PPC64 |
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PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
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PPC_FEATURE_SMT,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.platform = "ppc-cell-be",
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},
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{ /* PA Semi PA6T */
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.pvr_mask = 0x7fff0000,
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.pvr_value = 0x00900000,
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.cpu_name = "PA6T",
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.cpu_features = CPU_FTRS_PA6T,
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.cpu_user_features = COMMON_USER_PA6T,
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.icache_bsize = 64,
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.dcache_bsize = 64,
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.num_pmcs = 6,
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.platform = "pa6t",
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},
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{ /* default match */
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.pvr_mask = 0x00000000,
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.pvr_value = 0x00000000,
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.cpu_name = "POWER4 (compatible)",
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.cpu_features = CPU_FTRS_COMPATIBLE,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 6,
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.platform = "power4",
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}
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#endif /* CONFIG_PPC64 */
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#ifdef CONFIG_PPC32
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#if CLASSIC_PPC
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{ /* 601 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00010000,
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.cpu_name = "601",
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.cpu_features = CPU_FTRS_PPC601,
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.cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
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PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.platform = "ppc601",
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},
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{ /* 603 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00030000,
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.cpu_name = "603",
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.cpu_features = CPU_FTRS_603,
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.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.cpu_setup = __setup_cpu_603,
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.platform = "ppc603",
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},
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{ /* 603e */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00060000,
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.cpu_name = "603e",
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.cpu_features = CPU_FTRS_603,
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.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.cpu_setup = __setup_cpu_603,
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.platform = "ppc603",
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},
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{ /* 603ev */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00070000,
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.cpu_name = "603ev",
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.cpu_features = CPU_FTRS_603,
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.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.cpu_setup = __setup_cpu_603,
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.platform = "ppc603",
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},
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{ /* 604 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00040000,
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.cpu_name = "604",
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.cpu_features = CPU_FTRS_604,
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.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 2,
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.cpu_setup = __setup_cpu_604,
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.platform = "ppc604",
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},
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{ /* 604e */
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.pvr_mask = 0xfffff000,
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.pvr_value = 0x00090000,
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.cpu_name = "604e",
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.cpu_features = CPU_FTRS_604,
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.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.cpu_setup = __setup_cpu_604,
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.platform = "ppc604",
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},
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{ /* 604r */
|
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.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x00090000,
|
|
.cpu_name = "604r",
|
|
.cpu_features = CPU_FTRS_604,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_604,
|
|
.platform = "ppc604",
|
|
},
|
|
{ /* 604ev */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x000a0000,
|
|
.cpu_name = "604ev",
|
|
.cpu_features = CPU_FTRS_604,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_604,
|
|
.platform = "ppc604",
|
|
},
|
|
{ /* 740/750 (0x4202, don't support TAU ?) */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x00084202,
|
|
.cpu_name = "740/750",
|
|
.cpu_features = CPU_FTRS_740_NOTAU,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 750CX (80100 and 8010x?) */
|
|
.pvr_mask = 0xfffffff0,
|
|
.pvr_value = 0x00080100,
|
|
.cpu_name = "750CX",
|
|
.cpu_features = CPU_FTRS_750,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750cx,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 750CX (82201 and 82202) */
|
|
.pvr_mask = 0xfffffff0,
|
|
.pvr_value = 0x00082200,
|
|
.cpu_name = "750CX",
|
|
.cpu_features = CPU_FTRS_750,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750cx,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 750CXe (82214) */
|
|
.pvr_mask = 0xfffffff0,
|
|
.pvr_value = 0x00082210,
|
|
.cpu_name = "750CXe",
|
|
.cpu_features = CPU_FTRS_750,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750cx,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 750CXe "Gekko" (83214) */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x00083214,
|
|
.cpu_name = "750CXe",
|
|
.cpu_features = CPU_FTRS_750,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750cx,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 745/755 */
|
|
.pvr_mask = 0xfffff000,
|
|
.pvr_value = 0x00083000,
|
|
.cpu_name = "745/755",
|
|
.cpu_features = CPU_FTRS_750,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 750FX rev 1.x */
|
|
.pvr_mask = 0xffffff00,
|
|
.pvr_value = 0x70000100,
|
|
.cpu_name = "750FX",
|
|
.cpu_features = CPU_FTRS_750FX1,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 750FX rev 2.0 must disable HID0[DPM] */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x70000200,
|
|
.cpu_name = "750FX",
|
|
.cpu_features = CPU_FTRS_750FX2,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 750FX (All revs except 2.0) */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x70000000,
|
|
.cpu_name = "750FX",
|
|
.cpu_features = CPU_FTRS_750FX,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750fx,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 750GX */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x70020000,
|
|
.cpu_name = "750GX",
|
|
.cpu_features = CPU_FTRS_750GX,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750fx,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 740/750 (L2CR bit need fixup for 740) */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x00080000,
|
|
.cpu_name = "740/750",
|
|
.cpu_features = CPU_FTRS_740,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_750,
|
|
.platform = "ppc750",
|
|
},
|
|
{ /* 7400 rev 1.1 ? (no TAU) */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x000c1101,
|
|
.cpu_name = "7400 (1.1)",
|
|
.cpu_features = CPU_FTRS_7400_NOTAU,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_7400,
|
|
.platform = "ppc7400",
|
|
},
|
|
{ /* 7400 */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x000c0000,
|
|
.cpu_name = "7400",
|
|
.cpu_features = CPU_FTRS_7400,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_7400,
|
|
.platform = "ppc7400",
|
|
},
|
|
{ /* 7410 */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x800c0000,
|
|
.cpu_name = "7410",
|
|
.cpu_features = CPU_FTRS_7400,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.cpu_setup = __setup_cpu_7410,
|
|
.platform = "ppc7400",
|
|
},
|
|
{ /* 7450 2.0 - no doze/nap */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x80000200,
|
|
.cpu_name = "7450",
|
|
.cpu_features = CPU_FTRS_7450_20,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7450 2.1 */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x80000201,
|
|
.cpu_name = "7450",
|
|
.cpu_features = CPU_FTRS_7450_21,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7450 2.3 and newer */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x80000000,
|
|
.cpu_name = "7450",
|
|
.cpu_features = CPU_FTRS_7450_23,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7455 rev 1.x */
|
|
.pvr_mask = 0xffffff00,
|
|
.pvr_value = 0x80010100,
|
|
.cpu_name = "7455",
|
|
.cpu_features = CPU_FTRS_7455_1,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7455 rev 2.0 */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x80010200,
|
|
.cpu_name = "7455",
|
|
.cpu_features = CPU_FTRS_7455_20,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7455 others */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x80010000,
|
|
.cpu_name = "7455",
|
|
.cpu_features = CPU_FTRS_7455,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7447/7457 Rev 1.0 */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x80020100,
|
|
.cpu_name = "7447/7457",
|
|
.cpu_features = CPU_FTRS_7447_10,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7447/7457 Rev 1.1 */
|
|
.pvr_mask = 0xffffffff,
|
|
.pvr_value = 0x80020101,
|
|
.cpu_name = "7447/7457",
|
|
.cpu_features = CPU_FTRS_7447_10,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7447/7457 Rev 1.2 and later */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x80020000,
|
|
.cpu_name = "7447/7457",
|
|
.cpu_features = CPU_FTRS_7447,
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7447A */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x80030000,
|
|
.cpu_name = "7447A",
|
|
.cpu_features = CPU_FTRS_7447A,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 7448 */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x80040000,
|
|
.cpu_name = "7448",
|
|
.cpu_features = CPU_FTRS_7447A,
|
|
.cpu_user_features = COMMON_USER |
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 6,
|
|
.cpu_setup = __setup_cpu_745x,
|
|
.oprofile_cpu_type = "ppc/7450",
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
|
.platform = "ppc7450",
|
|
},
|
|
{ /* 82xx (8240, 8245, 8260 are all 603e cores) */
|
|
.pvr_mask = 0x7fff0000,
|
|
.pvr_value = 0x00810000,
|
|
.cpu_name = "82xx",
|
|
.cpu_features = CPU_FTRS_82XX,
|
|
.cpu_user_features = COMMON_USER,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.cpu_setup = __setup_cpu_603,
|
|
.platform = "ppc603",
|
|
},
|
|
{ /* All G2_LE (603e core, plus some) have the same pvr */
|
|
.pvr_mask = 0x7fff0000,
|
|
.pvr_value = 0x00820000,
|
|
.cpu_name = "G2_LE",
|
|
.cpu_features = CPU_FTRS_G2_LE,
|
|
.cpu_user_features = COMMON_USER,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.cpu_setup = __setup_cpu_603,
|
|
.platform = "ppc603",
|
|
},
|
|
{ /* e300c1 (a 603e core, plus some) on 83xx */
|
|
.pvr_mask = 0x7fff0000,
|
|
.pvr_value = 0x00830000,
|
|
.cpu_name = "e300c1",
|
|
.cpu_features = CPU_FTRS_E300,
|
|
.cpu_user_features = COMMON_USER,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.cpu_setup = __setup_cpu_603,
|
|
.platform = "ppc603",
|
|
},
|
|
{ /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
|
|
.pvr_mask = 0x7fff0000,
|
|
.pvr_value = 0x00840000,
|
|
.cpu_name = "e300c2",
|
|
.cpu_features = CPU_FTRS_E300,
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.cpu_setup = __setup_cpu_603,
|
|
.platform = "ppc603",
|
|
},
|
|
{ /* default match, we assume split I/D cache & TB (non-601)... */
|
|
.pvr_mask = 0x00000000,
|
|
.pvr_value = 0x00000000,
|
|
.cpu_name = "(generic PPC)",
|
|
.cpu_features = CPU_FTRS_CLASSIC32,
|
|
.cpu_user_features = COMMON_USER,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc603",
|
|
},
|
|
#endif /* CLASSIC_PPC */
|
|
#ifdef CONFIG_8xx
|
|
{ /* 8xx */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x00500000,
|
|
.cpu_name = "8xx",
|
|
/* CPU_FTR_MAYBE_CAN_DOZE is possible,
|
|
* if the 8xx code is there.... */
|
|
.cpu_features = CPU_FTRS_8XX,
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
.icache_bsize = 16,
|
|
.dcache_bsize = 16,
|
|
.platform = "ppc823",
|
|
},
|
|
#endif /* CONFIG_8xx */
|
|
#ifdef CONFIG_40x
|
|
{ /* 403GC */
|
|
.pvr_mask = 0xffffff00,
|
|
.pvr_value = 0x00200200,
|
|
.cpu_name = "403GC",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
.icache_bsize = 16,
|
|
.dcache_bsize = 16,
|
|
.platform = "ppc403",
|
|
},
|
|
{ /* 403GCX */
|
|
.pvr_mask = 0xffffff00,
|
|
.pvr_value = 0x00201400,
|
|
.cpu_name = "403GCX",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
|
|
.icache_bsize = 16,
|
|
.dcache_bsize = 16,
|
|
.platform = "ppc403",
|
|
},
|
|
{ /* 403G ?? */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x00200000,
|
|
.cpu_name = "403G ??",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
.icache_bsize = 16,
|
|
.dcache_bsize = 16,
|
|
.platform = "ppc403",
|
|
},
|
|
{ /* 405GP */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x40110000,
|
|
.cpu_name = "405GP",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* STB 03xxx */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x40130000,
|
|
.cpu_name = "STB03xxx",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* STB 04xxx */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x41810000,
|
|
.cpu_name = "STB04xxx",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* NP405L */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x41610000,
|
|
.cpu_name = "NP405L",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* NP4GS3 */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x40B10000,
|
|
.cpu_name = "NP4GS3",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* NP405H */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x41410000,
|
|
.cpu_name = "NP405H",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* 405GPr */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x50910000,
|
|
.cpu_name = "405GPr",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* STBx25xx */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x51510000,
|
|
.cpu_name = "STBx25xx",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* 405LP */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x41F10000,
|
|
.cpu_name = "405LP",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* Xilinx Virtex-II Pro */
|
|
.pvr_mask = 0xfffff000,
|
|
.pvr_value = 0x20010000,
|
|
.cpu_name = "Virtex-II Pro",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* Xilinx Virtex-4 FX */
|
|
.pvr_mask = 0xfffff000,
|
|
.pvr_value = 0x20011000,
|
|
.cpu_name = "Virtex-4 FX",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
{ /* 405EP */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x51210000,
|
|
.cpu_name = "405EP",
|
|
.cpu_features = CPU_FTRS_40X,
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc405",
|
|
},
|
|
|
|
#endif /* CONFIG_40x */
|
|
#ifdef CONFIG_44x
|
|
{
|
|
.pvr_mask = 0xf0000fff,
|
|
.pvr_value = 0x40000850,
|
|
.cpu_name = "440EP Rev. A",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440",
|
|
},
|
|
{
|
|
.pvr_mask = 0xf0000fff,
|
|
.pvr_value = 0x400008d3,
|
|
.cpu_name = "440EP Rev. B",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440",
|
|
},
|
|
{ /* 440GP Rev. B */
|
|
.pvr_mask = 0xf0000fff,
|
|
.pvr_value = 0x40000440,
|
|
.cpu_name = "440GP Rev. B",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440gp",
|
|
},
|
|
{ /* 440GP Rev. C */
|
|
.pvr_mask = 0xf0000fff,
|
|
.pvr_value = 0x40000481,
|
|
.cpu_name = "440GP Rev. C",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440gp",
|
|
},
|
|
{ /* 440GX Rev. A */
|
|
.pvr_mask = 0xf0000fff,
|
|
.pvr_value = 0x50000850,
|
|
.cpu_name = "440GX Rev. A",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440",
|
|
},
|
|
{ /* 440GX Rev. B */
|
|
.pvr_mask = 0xf0000fff,
|
|
.pvr_value = 0x50000851,
|
|
.cpu_name = "440GX Rev. B",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440",
|
|
},
|
|
{ /* 440GX Rev. C */
|
|
.pvr_mask = 0xf0000fff,
|
|
.pvr_value = 0x50000892,
|
|
.cpu_name = "440GX Rev. C",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440",
|
|
},
|
|
{ /* 440GX Rev. F */
|
|
.pvr_mask = 0xf0000fff,
|
|
.pvr_value = 0x50000894,
|
|
.cpu_name = "440GX Rev. F",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440",
|
|
},
|
|
{ /* 440SP Rev. A */
|
|
.pvr_mask = 0xff000fff,
|
|
.pvr_value = 0x53000891,
|
|
.cpu_name = "440SP Rev. A",
|
|
.cpu_features = CPU_FTRS_44X,
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440",
|
|
},
|
|
{ /* 440SPe Rev. A */
|
|
.pvr_mask = 0xff000fff,
|
|
.pvr_value = 0x53000890,
|
|
.cpu_name = "440SPe Rev. A",
|
|
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
|
|
CPU_FTR_USE_TB,
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc440",
|
|
},
|
|
#endif /* CONFIG_44x */
|
|
#ifdef CONFIG_FSL_BOOKE
|
|
{ /* e200z5 */
|
|
.pvr_mask = 0xfff00000,
|
|
.pvr_value = 0x81000000,
|
|
.cpu_name = "e200z5",
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
|
.cpu_features = CPU_FTRS_E200,
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
PPC_FEATURE_HAS_EFP_SINGLE |
|
|
PPC_FEATURE_UNIFIED_CACHE,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc5554",
|
|
},
|
|
{ /* e200z6 */
|
|
.pvr_mask = 0xfff00000,
|
|
.pvr_value = 0x81100000,
|
|
.cpu_name = "e200z6",
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
|
.cpu_features = CPU_FTRS_E200,
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
PPC_FEATURE_SPE_COMP |
|
|
PPC_FEATURE_HAS_EFP_SINGLE |
|
|
PPC_FEATURE_UNIFIED_CACHE,
|
|
.dcache_bsize = 32,
|
|
.platform = "ppc5554",
|
|
},
|
|
{ /* e500 */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x80200000,
|
|
.cpu_name = "e500",
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
|
.cpu_features = CPU_FTRS_E500,
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
PPC_FEATURE_SPE_COMP |
|
|
PPC_FEATURE_HAS_EFP_SINGLE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.oprofile_cpu_type = "ppc/e500",
|
|
.oprofile_type = PPC_OPROFILE_BOOKE,
|
|
.platform = "ppc8540",
|
|
},
|
|
{ /* e500v2 */
|
|
.pvr_mask = 0xffff0000,
|
|
.pvr_value = 0x80210000,
|
|
.cpu_name = "e500v2",
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
|
.cpu_features = CPU_FTRS_E500_2,
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
PPC_FEATURE_SPE_COMP |
|
|
PPC_FEATURE_HAS_EFP_SINGLE |
|
|
PPC_FEATURE_HAS_EFP_DOUBLE,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.num_pmcs = 4,
|
|
.oprofile_cpu_type = "ppc/e500",
|
|
.oprofile_type = PPC_OPROFILE_BOOKE,
|
|
.platform = "ppc8548",
|
|
},
|
|
#endif
|
|
#if !CLASSIC_PPC
|
|
{ /* default match */
|
|
.pvr_mask = 0x00000000,
|
|
.pvr_value = 0x00000000,
|
|
.cpu_name = "(generic PPC)",
|
|
.cpu_features = CPU_FTRS_GENERIC_32,
|
|
.cpu_user_features = PPC_FEATURE_32,
|
|
.icache_bsize = 32,
|
|
.dcache_bsize = 32,
|
|
.platform = "powerpc",
|
|
}
|
|
#endif /* !CLASSIC_PPC */
|
|
#endif /* CONFIG_PPC32 */
|
|
};
|
|
|
|
struct cpu_spec *identify_cpu(unsigned long offset)
|
|
{
|
|
struct cpu_spec *s = cpu_specs;
|
|
struct cpu_spec **cur = &cur_cpu_spec;
|
|
unsigned int pvr = mfspr(SPRN_PVR);
|
|
int i;
|
|
|
|
s = PTRRELOC(s);
|
|
cur = PTRRELOC(cur);
|
|
|
|
if (*cur != NULL)
|
|
return PTRRELOC(*cur);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
|
|
if ((pvr & s->pvr_mask) == s->pvr_value) {
|
|
*cur = cpu_specs + i;
|
|
#ifdef CONFIG_PPC64
|
|
/* ppc64 expects identify_cpu to also call setup_cpu
|
|
* for that processor. I will consolidate that at a
|
|
* later time, for now, just use our friend #ifdef.
|
|
* we also don't need to PTRRELOC the function pointer
|
|
* on ppc64 as we are running at 0 in real mode.
|
|
*/
|
|
if (s->cpu_setup) {
|
|
s->cpu_setup(offset, s);
|
|
}
|
|
#endif /* CONFIG_PPC64 */
|
|
return s;
|
|
}
|
|
BUG();
|
|
return NULL;
|
|
}
|
|
|
|
void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
|
|
{
|
|
struct fixup_entry {
|
|
unsigned long mask;
|
|
unsigned long value;
|
|
long start_off;
|
|
long end_off;
|
|
} *fcur, *fend;
|
|
|
|
fcur = fixup_start;
|
|
fend = fixup_end;
|
|
|
|
for (; fcur < fend; fcur++) {
|
|
unsigned int *pstart, *pend, *p;
|
|
|
|
if ((value & fcur->mask) == fcur->value)
|
|
continue;
|
|
|
|
/* These PTRRELOCs will disappear once the new scheme for
|
|
* modules and vdso is implemented
|
|
*/
|
|
pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
|
|
pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
|
|
|
|
for (p = pstart; p < pend; p++) {
|
|
*p = 0x60000000u;
|
|
asm volatile ("dcbst 0, %0" : : "r" (p));
|
|
}
|
|
asm volatile ("sync" : : : "memory");
|
|
for (p = pstart; p < pend; p++)
|
|
asm volatile ("icbi 0,%0" : : "r" (p));
|
|
asm volatile ("sync; isync" : : : "memory");
|
|
}
|
|
}
|