forked from Minki/linux
476e5be710
The current code base is not linking with the OMAP_PM_NONE option set. Since the option OMAP_PM_NOOP provides a no-op/debug layer, OMAP_PM_NONE can be removed. OMAP_PM_NOOP is enabled by default by Kconfig. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
353 lines
14 KiB
C
353 lines
14 KiB
C
/*
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* omap-pm.h - OMAP power management interface
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*
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* Copyright (C) 2008-2010 Texas Instruments, Inc.
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* Copyright (C) 2008-2010 Nokia Corporation
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* Paul Walmsley
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*
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* Interface developed by (in alphabetical order): Karthik Dasu, Jouni
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* Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa,
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* Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley,
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* Richard Woodruff
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*/
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#ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H
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#define ASM_ARM_ARCH_OMAP_OMAP_PM_H
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#include <linux/device.h>
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#include <linux/cpufreq.h>
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#include <linux/clk.h>
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#include <linux/opp.h>
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/*
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* agent_id values for use with omap_pm_set_min_bus_tput():
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*
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* OCP_INITIATOR_AGENT is only valid for devices that can act as
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* initiators -- it represents the device's L3 interconnect
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* connection. OCP_TARGET_AGENT represents the device's L4
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* interconnect connection.
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*/
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#define OCP_TARGET_AGENT 1
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#define OCP_INITIATOR_AGENT 2
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/**
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* omap_pm_if_early_init - OMAP PM init code called before clock fw init
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* @mpu_opp_table: array ptr to struct omap_opp for MPU
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* @dsp_opp_table: array ptr to struct omap_opp for DSP
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* @l3_opp_table : array ptr to struct omap_opp for CORE
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*
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* Initialize anything that must be configured before the clock
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* framework starts. The "_if_" is to avoid name collisions with the
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* PM idle-loop code.
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*/
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int __init omap_pm_if_early_init(void);
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/**
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* omap_pm_if_init - OMAP PM init code called after clock fw init
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*
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* The main initialization code. OPP tables are passed in here. The
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* "_if_" is to avoid name collisions with the PM idle-loop code.
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*/
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int __init omap_pm_if_init(void);
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/**
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* omap_pm_if_exit - OMAP PM exit code
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*
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* Exit code; currently unused. The "_if_" is to avoid name
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* collisions with the PM idle-loop code.
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*/
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void omap_pm_if_exit(void);
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/*
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* Device-driver-originated constraints (via board-*.c files, platform_data)
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*/
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/**
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* omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
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* @dev: struct device * requesting the constraint
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* @t: maximum MPU wakeup latency in microseconds
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*
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* Request that the maximum interrupt latency for the MPU to be no
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* greater than @t microseconds. "Interrupt latency" in this case is
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* defined as the elapsed time from the occurrence of a hardware or
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* timer interrupt to the time when the device driver's interrupt
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* service routine has been entered by the MPU.
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*
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* It is intended that underlying PM code will use this information to
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* determine what power state to put the MPU powerdomain into, and
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* possibly the CORE powerdomain as well, since interrupt handling
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* code currently runs from SDRAM. Advanced PM or board*.c code may
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* also configure interrupt controller priorities, OCP bus priorities,
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* CPU speed(s), etc.
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*
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* This function will not affect device wakeup latency, e.g., time
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* elapsed from when a device driver enables a hardware device with
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* clk_enable(), to when the device is ready for register access or
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* other use. To control this device wakeup latency, use
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* omap_pm_set_max_dev_wakeup_lat()
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*
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* Multiple calls to omap_pm_set_max_mpu_wakeup_lat() will replace the
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* previous t value. To remove the latency target for the MPU, call
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* with t = -1.
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*
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* XXX This constraint will be deprecated soon in favor of the more
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* general omap_pm_set_max_dev_wakeup_lat()
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*
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* Returns -EINVAL for an invalid argument, -ERANGE if the constraint
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* is not satisfiable, or 0 upon success.
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*/
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int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
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/**
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* omap_pm_set_min_bus_tput - set minimum bus throughput needed by device
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* @dev: struct device * requesting the constraint
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* @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT)
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* @r: minimum throughput (in KiB/s)
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*
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* Request that the minimum data throughput on the OCP interconnect
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* attached to device @dev interconnect agent @tbus_id be no less
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* than @r KiB/s.
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*
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* It is expected that the OMAP PM or bus code will use this
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* information to set the interconnect clock to run at the lowest
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* possible speed that satisfies all current system users. The PM or
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* bus code will adjust the estimate based on its model of the bus, so
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* device driver authors should attempt to specify an accurate
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* quantity for their device use case, and let the PM or bus code
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* overestimate the numbers as necessary to handle request/response
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* latency, other competing users on the system, etc. On OMAP2/3, if
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* a driver requests a minimum L4 interconnect speed constraint, the
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* code will also need to add an minimum L3 interconnect speed
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* constraint,
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*
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* Multiple calls to omap_pm_set_min_bus_tput() will replace the
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* previous rate value for this device. To remove the interconnect
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* throughput restriction for this device, call with r = 0.
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*
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* Returns -EINVAL for an invalid argument, -ERANGE if the constraint
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* is not satisfiable, or 0 upon success.
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*/
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int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
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/**
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* omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
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* @req_dev: struct device * requesting the constraint, or NULL if none
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* @dev: struct device * to set the constraint one
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* @t: maximum device wakeup latency in microseconds
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*
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* Request that the maximum amount of time necessary for a device @dev
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* to become accessible after its clocks are enabled should be no
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* greater than @t microseconds. Specifically, this represents the
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* time from when a device driver enables device clocks with
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* clk_enable(), to when the register reads and writes on the device
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* will succeed. This function should be called before clk_disable()
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* is called, since the power state transition decision may be made
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* during clk_disable().
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*
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* It is intended that underlying PM code will use this information to
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* determine what power state to put the powerdomain enclosing this
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* device into.
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*
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* Multiple calls to omap_pm_set_max_dev_wakeup_lat() will replace the
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* previous wakeup latency values for this device. To remove the
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* wakeup latency restriction for this device, call with t = -1.
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*
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* Returns -EINVAL for an invalid argument, -ERANGE if the constraint
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* is not satisfiable, or 0 upon success.
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*/
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int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev,
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long t);
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/**
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* omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
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* @dev: struct device *
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* @t: maximum DMA transfer start latency in microseconds
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*
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* Request that the maximum system DMA transfer start latency for this
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* device 'dev' should be no greater than 't' microseconds. "DMA
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* transfer start latency" here is defined as the elapsed time from
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* when a device (e.g., McBSP) requests that a system DMA transfer
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* start or continue, to the time at which data starts to flow into
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* that device from the system DMA controller.
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*
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* It is intended that underlying PM code will use this information to
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* determine what power state to put the CORE powerdomain into.
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*
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* Since system DMA transfers may not involve the MPU, this function
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* will not affect MPU wakeup latency. Use set_max_cpu_lat() to do
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* so. Similarly, this function will not affect device wakeup latency
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* -- use set_max_dev_wakeup_lat() to affect that.
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*
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* Multiple calls to set_max_sdma_lat() will replace the previous t
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* value for this device. To remove the maximum DMA latency for this
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* device, call with t = -1.
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*
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* Returns -EINVAL for an invalid argument, -ERANGE if the constraint
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* is not satisfiable, or 0 upon success.
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*/
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int omap_pm_set_max_sdma_lat(struct device *dev, long t);
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/**
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* omap_pm_set_min_clk_rate - set minimum clock rate requested by @dev
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* @dev: struct device * requesting the constraint
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* @clk: struct clk * to set the minimum rate constraint on
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* @r: minimum rate in Hz
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*
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* Request that the minimum clock rate on the device @dev's clk @clk
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* be no less than @r Hz.
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*
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* It is expected that the OMAP PM code will use this information to
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* find an OPP or clock setting that will satisfy this clock rate
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* constraint, along with any other applicable system constraints on
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* the clock rate or corresponding voltage, etc.
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*
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* omap_pm_set_min_clk_rate() differs from the clock code's
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* clk_set_rate() in that it considers other constraints before taking
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* any hardware action, and may change a system OPP rather than just a
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* clock rate. clk_set_rate() is intended to be a low-level
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* interface.
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*
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* omap_pm_set_min_clk_rate() is easily open to abuse. A better API
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* would be something like "omap_pm_set_min_dev_performance()";
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* however, there is no easily-generalizable concept of performance
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* that applies to all devices. Only a device (and possibly the
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* device subsystem) has both the subsystem-specific knowledge, and
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* the hardware IP block-specific knowledge, to translate a constraint
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* on "touchscreen sampling accuracy" or "number of pixels or polygons
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* rendered per second" to a clock rate. This translation can be
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* dependent on the hardware IP block's revision, or firmware version,
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* and the driver is the only code on the system that has this
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* information and can know how to translate that into a clock rate.
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*
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* The intended use-case for this function is for userspace or other
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* kernel code to communicate a particular performance requirement to
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* a subsystem; then for the subsystem to communicate that requirement
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* to something that is meaningful to the device driver; then for the
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* device driver to convert that requirement to a clock rate, and to
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* then call omap_pm_set_min_clk_rate().
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*
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* Users of this function (such as device drivers) should not simply
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* call this function with some high clock rate to ensure "high
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* performance." Rather, the device driver should take a performance
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* constraint from its subsystem, such as "render at least X polygons
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* per second," and use some formula or table to convert that into a
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* clock rate constraint given the hardware type and hardware
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* revision. Device drivers or subsystems should not assume that they
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* know how to make a power/performance tradeoff - some device use
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* cases may tolerate a lower-fidelity device function for lower power
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* consumption; others may demand a higher-fidelity device function,
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* no matter what the power consumption.
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*
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* Multiple calls to omap_pm_set_min_clk_rate() will replace the
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* previous rate value for the device @dev. To remove the minimum clock
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* rate constraint for the device, call with r = 0.
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*
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* Returns -EINVAL for an invalid argument, -ERANGE if the constraint
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* is not satisfiable, or 0 upon success.
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*/
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int omap_pm_set_min_clk_rate(struct device *dev, struct clk *c, long r);
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/*
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* DSP Bridge-specific constraints
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*/
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/**
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* omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
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*
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* Intended for use by DSPBridge. Returns an array of OPP->DSP clock
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* frequency entries. The final item in the array should have .rate =
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* .opp_id = 0.
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*/
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const struct omap_opp *omap_pm_dsp_get_opp_table(void);
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/**
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* omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
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* @opp_id: target DSP OPP ID
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*
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* Set a minimum OPP ID for the DSP. This is intended to be called
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* only from the DSP Bridge MPU-side driver. Unfortunately, the only
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* information that code receives from the DSP/BIOS load estimator is the
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* target OPP ID; hence, this interface. No return value.
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*/
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void omap_pm_dsp_set_min_opp(u8 opp_id);
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/**
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* omap_pm_dsp_get_opp - report the current DSP OPP ID
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*
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* Report the current OPP for the DSP. Since on OMAP3, the DSP and
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* MPU share a single voltage domain, the OPP ID returned back may
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* represent a higher DSP speed than the OPP requested via
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* omap_pm_dsp_set_min_opp().
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*
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* Returns the current VDD1 OPP ID, or 0 upon error.
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*/
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u8 omap_pm_dsp_get_opp(void);
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/*
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* CPUFreq-originated constraint
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*
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* In the future, this should be handled by custom OPP clocktype
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* functions.
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*/
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/**
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* omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
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*
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* Provide a frequency table usable by CPUFreq for the current chip/board.
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* Returns a pointer to a struct cpufreq_frequency_table array or NULL
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* upon error.
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*/
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struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
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/**
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* omap_pm_cpu_set_freq - set the current minimum MPU frequency
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* @f: MPU frequency in Hz
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*
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* Set the current minimum CPU frequency. The actual CPU frequency
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* used could end up higher if the DSP requested a higher OPP.
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* Intended to be called by plat-omap/cpu_omap.c:omap_target(). No
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* return value.
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*/
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void omap_pm_cpu_set_freq(unsigned long f);
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/**
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* omap_pm_cpu_get_freq - report the current CPU frequency
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*
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* Returns the current MPU frequency, or 0 upon error.
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*/
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unsigned long omap_pm_cpu_get_freq(void);
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/*
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* Device context loss tracking
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*/
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/**
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* omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx
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* @dev: struct device *
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*
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* This function returns the number of times that the device @dev has
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* lost its internal context. This generally occurs on a powerdomain
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* transition to OFF. Drivers use this as an optimization to avoid restoring
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* context if the device hasn't lost it. To use, drivers should initially
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* call this in their context save functions and store the result. Early in
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* the driver's context restore function, the driver should call this function
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* again, and compare the result to the stored counter. If they differ, the
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* driver must restore device context. If the number of context losses
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* exceeds the maximum positive integer, the function will wrap to 0 and
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* continue counting. Returns the number of context losses for this device,
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* or zero upon error.
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*/
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u32 omap_pm_get_dev_context_loss_count(struct device *dev);
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void omap_pm_enable_off_mode(void);
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void omap_pm_disable_off_mode(void);
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#endif
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