forked from Minki/linux
3c6bee1d40
ICC likes to complain about storage class not being first, GCC doesn't care much (except for cases like "inline static"). have a hard time seeing how it could break anything. Thanks to Gabriel A. Devenyi for pointing out http://linuxicc.sourceforge.net/ which is what made me create this patch. Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
285 lines
8.4 KiB
C
285 lines
8.4 KiB
C
/*
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* linux/arch/h8300/platform/h8300h/ptrace_h8300h.c
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* ptrace cpu depend helper functions
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*
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* Yoshinori Sato <ysato@users.sourceforge.jp>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of
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* this archive for more details.
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*/
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#include <linux/linkage.h>
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#include <linux/sched.h>
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#include <asm/ptrace.h>
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#define CCR_MASK 0x6f /* mode/imask not set */
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#define BREAKINST 0x5730 /* trapa #3 */
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/* Mapping from PT_xxx to the stack offset at which the register is
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saved. Notice that usp has no stack-slot and needs to be treated
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specially (see get_reg/put_reg below). */
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static const int h8300_register_offset[] = {
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PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4),
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PT_REG(er5), PT_REG(er6), PT_REG(er0), PT_REG(orig_er0),
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PT_REG(ccr), PT_REG(pc)
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};
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/* read register */
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long h8300_get_reg(struct task_struct *task, int regno)
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{
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switch (regno) {
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case PT_USP:
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return task->thread.usp + sizeof(long)*2;
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case PT_CCR:
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return *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
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default:
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return *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]);
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}
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}
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/* write register */
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int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
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{
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unsigned short oldccr;
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switch (regno) {
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case PT_USP:
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task->thread.usp = data - sizeof(long)*2;
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case PT_CCR:
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oldccr = *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
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oldccr &= ~CCR_MASK;
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data &= CCR_MASK;
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data |= oldccr;
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*(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
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break;
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default:
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*(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
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break;
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}
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return 0;
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}
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/* disable singlestep */
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void h8300_disable_trace(struct task_struct *child)
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{
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if((long)child->thread.breakinfo.addr != -1L) {
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*child->thread.breakinfo.addr = child->thread.breakinfo.inst;
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child->thread.breakinfo.addr = (unsigned short *)-1L;
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}
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}
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/* calculate next pc */
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enum jump_type {none, /* normal instruction */
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jabs, /* absolute address jump */
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ind, /* indirect address jump */
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ret, /* return to subrutine */
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reg, /* register indexed jump */
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relb, /* pc relative jump (byte offset) */
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relw, /* pc relative jump (word offset) */
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};
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/* opcode decode table define
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ptn: opcode pattern
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msk: opcode bitmask
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len: instruction length (<0 next table index)
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jmp: jump operation mode */
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struct optable {
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unsigned char bitpattern;
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unsigned char bitmask;
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signed char length;
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signed char type;
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} __attribute__((aligned(1),packed));
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#define OPTABLE(ptn,msk,len,jmp) \
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{ \
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.bitpattern = ptn, \
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.bitmask = msk, \
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.length = len, \
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.type = jmp, \
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}
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static const struct optable optable_0[] = {
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OPTABLE(0x00,0xff, 1,none), /* 0x00 */
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OPTABLE(0x01,0xff,-1,none), /* 0x01 */
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OPTABLE(0x02,0xfe, 1,none), /* 0x02-0x03 */
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OPTABLE(0x04,0xee, 1,none), /* 0x04-0x05/0x14-0x15 */
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OPTABLE(0x06,0xfe, 1,none), /* 0x06-0x07 */
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OPTABLE(0x08,0xea, 1,none), /* 0x08-0x09/0x0c-0x0d/0x18-0x19/0x1c-0x1d */
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OPTABLE(0x0a,0xee, 1,none), /* 0x0a-0x0b/0x1a-0x1b */
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OPTABLE(0x0e,0xee, 1,none), /* 0x0e-0x0f/0x1e-0x1f */
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OPTABLE(0x10,0xfc, 1,none), /* 0x10-0x13 */
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OPTABLE(0x16,0xfe, 1,none), /* 0x16-0x17 */
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OPTABLE(0x20,0xe0, 1,none), /* 0x20-0x3f */
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OPTABLE(0x40,0xf0, 1,relb), /* 0x40-0x4f */
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OPTABLE(0x50,0xfc, 1,none), /* 0x50-0x53 */
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OPTABLE(0x54,0xfd, 1,ret ), /* 0x54/0x56 */
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OPTABLE(0x55,0xff, 1,relb), /* 0x55 */
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OPTABLE(0x57,0xff, 1,none), /* 0x57 */
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OPTABLE(0x58,0xfb, 2,relw), /* 0x58/0x5c */
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OPTABLE(0x59,0xfb, 1,reg ), /* 0x59/0x5b */
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OPTABLE(0x5a,0xfb, 2,jabs), /* 0x5a/0x5e */
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OPTABLE(0x5b,0xfb, 2,ind ), /* 0x5b/0x5f */
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OPTABLE(0x60,0xe8, 1,none), /* 0x60-0x67/0x70-0x77 */
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OPTABLE(0x68,0xfa, 1,none), /* 0x68-0x69/0x6c-0x6d */
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OPTABLE(0x6a,0xfe,-2,none), /* 0x6a-0x6b */
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OPTABLE(0x6e,0xfe, 2,none), /* 0x6e-0x6f */
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OPTABLE(0x78,0xff, 4,none), /* 0x78 */
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OPTABLE(0x79,0xff, 2,none), /* 0x79 */
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OPTABLE(0x7a,0xff, 3,none), /* 0x7a */
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OPTABLE(0x7b,0xff, 2,none), /* 0x7b */
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OPTABLE(0x7c,0xfc, 2,none), /* 0x7c-0x7f */
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OPTABLE(0x80,0x80, 1,none), /* 0x80-0xff */
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};
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static const struct optable optable_1[] = {
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OPTABLE(0x00,0xff,-3,none), /* 0x0100 */
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OPTABLE(0x40,0xf0,-3,none), /* 0x0140-0x14f */
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OPTABLE(0x80,0xf0, 1,none), /* 0x0180-0x018f */
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OPTABLE(0xc0,0xc0, 2,none), /* 0x01c0-0x01ff */
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};
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static const struct optable optable_2[] = {
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OPTABLE(0x00,0x20, 2,none), /* 0x6a0?/0x6a8?/0x6b0?/0x6b8? */
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OPTABLE(0x20,0x20, 3,none), /* 0x6a2?/0x6aa?/0x6b2?/0x6ba? */
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};
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static const struct optable optable_3[] = {
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OPTABLE(0x69,0xfb, 2,none), /* 0x010069/0x01006d/014069/0x01406d */
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OPTABLE(0x6b,0xff,-4,none), /* 0x01006b/0x01406b */
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OPTABLE(0x6f,0xff, 3,none), /* 0x01006f/0x01406f */
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OPTABLE(0x78,0xff, 5,none), /* 0x010078/0x014078 */
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};
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static const struct optable optable_4[] = {
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OPTABLE(0x00,0x78, 3,none), /* 0x0100690?/0x01006d0?/0140690/0x01406d0?/0x0100698?/0x01006d8?/0140698?/0x01406d8? */
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OPTABLE(0x20,0x78, 4,none), /* 0x0100692?/0x01006d2?/0140692/0x01406d2?/0x010069a?/0x01006da?/014069a?/0x01406da? */
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};
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static const struct optables_list {
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const struct optable *ptr;
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int size;
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} optables[] = {
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#define OPTABLES(no) \
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{ \
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.ptr = optable_##no, \
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.size = sizeof(optable_##no) / sizeof(struct optable), \
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}
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OPTABLES(0),
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OPTABLES(1),
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OPTABLES(2),
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OPTABLES(3),
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OPTABLES(4),
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};
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const unsigned char condmask[] = {
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0x00,0x40,0x01,0x04,0x02,0x08,0x10,0x20
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};
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static int isbranch(struct task_struct *task,int reson)
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{
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unsigned char cond = h8300_get_reg(task, PT_CCR);
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/* encode complex conditions */
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/* B4: N^V
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B5: Z|(N^V)
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B6: C|Z */
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__asm__("bld #3,%w0\n\t"
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"bxor #1,%w0\n\t"
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"bst #4,%w0\n\t"
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"bor #2,%w0\n\t"
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"bst #5,%w0\n\t"
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"bld #2,%w0\n\t"
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"bor #0,%w0\n\t"
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"bst #6,%w0\n\t"
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:"=&r"(cond)::"cc");
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cond &= condmask[reson >> 1];
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if (!(reson & 1))
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return cond == 0;
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else
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return cond != 0;
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}
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static unsigned short *getnextpc(struct task_struct *child, unsigned short *pc)
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{
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const struct optable *op;
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unsigned char *fetch_p;
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unsigned char inst;
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unsigned long addr;
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unsigned long *sp;
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int op_len,regno;
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op = optables[0].ptr;
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op_len = optables[0].size;
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fetch_p = (unsigned char *)pc;
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inst = *fetch_p++;
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do {
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if ((inst & op->bitmask) == op->bitpattern) {
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if (op->length < 0) {
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op = optables[-op->length].ptr;
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op_len = optables[-op->length].size + 1;
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inst = *fetch_p++;
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} else {
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switch (op->type) {
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case none:
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return pc + op->length;
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case jabs:
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addr = *(unsigned long *)pc;
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return (unsigned short *)(addr & 0x00ffffff);
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case ind:
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addr = *pc & 0xff;
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return (unsigned short *)(*(unsigned long *)addr);
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case ret:
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sp = (unsigned long *)h8300_get_reg(child, PT_USP);
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/* user stack frames
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| er0 | temporary saved
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+--------+
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| exp | exception stack frames
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+--------+
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| ret pc | userspace return address
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*/
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return (unsigned short *)(*(sp+2) & 0x00ffffff);
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case reg:
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regno = (*pc >> 4) & 0x07;
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if (regno == 0)
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addr = h8300_get_reg(child, PT_ER0);
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else
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addr = h8300_get_reg(child, regno-1+PT_ER1);
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return (unsigned short *)addr;
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case relb:
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if (inst == 0x55 || isbranch(child,inst & 0x0f))
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pc = (unsigned short *)((unsigned long)pc +
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((signed char)(*fetch_p)));
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return pc+1; /* skip myself */
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case relw:
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if (inst == 0x5c || isbranch(child,(*fetch_p & 0xf0) >> 4))
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pc = (unsigned short *)((unsigned long)pc +
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((signed short)(*(pc+1))));
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return pc+2; /* skip myself */
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}
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}
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} else
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op++;
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} while(--op_len > 0);
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return NULL;
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}
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/* Set breakpoint(s) to simulate a single step from the current PC. */
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void h8300_enable_trace(struct task_struct *child)
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{
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unsigned short *nextpc;
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nextpc = getnextpc(child,(unsigned short *)h8300_get_reg(child, PT_PC));
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child->thread.breakinfo.addr = nextpc;
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child->thread.breakinfo.inst = *nextpc;
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*nextpc = BREAKINST;
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}
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asmlinkage void trace_trap(unsigned long bp)
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{
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if ((unsigned long)current->thread.breakinfo.addr == bp) {
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h8300_disable_trace(current);
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force_sig(SIGTRAP,current);
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} else
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force_sig(SIGILL,current);
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}
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