linux/arch/arc/include/asm
Linus Torvalds 0890a26479 - Support for HS38 cores based on ARCv2 ISA
ARCv2 is the next generation ISA from Synopsys and basis for the
      HS3{4,6,8} families of processors which retain the traditional ARC mantra of
      low power and configurability and are now more performant and feature rich.
 
      HS38x is a 10 stage pipeline core which supports MMU (with huge pages) and
      SMP (upto 4 cores) among other features.
 
      + www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor
      + http://news.synopsys.com/2014-10-14-New-DesignWare-ARC-HS38-Processor-Doubles-Performance-for-Embedded-Linux-Applications
      + http://www.embedded.com/electronics-news/4435975/Synopsys-ARC-HS38-core-gives-2X-boost-to-Linux-based-apps
 
  - Support for ARC SDP (Software Development platform): Main Board + CPU Cards
     = AXS101: CPU Card with ARC700 in silicon @ 700 MHz
     = AXS103: CPU Card with HS38x in FPGA
 
  - Refactoring of ARCompact port to accomodate new ARCv2 ISA
  - Miscll updates/cleanups
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVk0g8AAoJEGnX8d3iisJecqsQAI6gvBC4GSNYDrmgGJJK1uLQ
 uf6ZXQRLBtyxwa6VMvaNFe91i5XV5WvEXDuNBQX4FdYbp7Fs+Jz5VK79xFtbVEdU
 H6mgKcs9HBwQvrHBxl54XxxXfX7kD1kxrlV7cL4b7bXTEX0XyH5ROUj600/YP+B4
 8t+XdYcfgFK0HpeFGXVP+Xmv/e+hBbzCpOjOd2ZFqEwymvSpZDc4KZ2yDvV2+Ybn
 JNZ421urQOrxR27njvvPvtpeN7uuJKfRYq7IuIR8+Ad72S19EDdw+DZHp2XoUMXA
 wgydWrrOaX2Dr2CmXHGA1C4nWEG7+Yo9I1WitjJct0tkOQyDR2OIDGmvKGBd1uoS
 QsihtoKBRvns+2gpXBEOmOHmF6ggpHNN0ppIwCp+AK5kX3fmxBtyUekyYmVpg8oQ
 xgFIuJgmiAvW7QB7xIO6SFFt18De2ifDRrKWJwVauvfW/PvUIwuUBEcbh0OHAn54
 ebUUWu2ZdVNe0XCsZOAQGwYHZRWBk8Bn3bhFpNnOliRiF77e9GsKeGYeIswYFy7I
 42Gp35ftEj1pLLFZ1vIsAo72N6ErmHwPOcJkaBYaTbPGPcTEO2aR6b8WOcCjsPxK
 DUeUV3H2HV+6V4jw/96lnsaRqsaj4TsJxEAFRR3wT1DLoRudCIDubaXTdvvDie77
 RgKn4ZdxgmXD97+deBqc
 =KwNo
 -----END PGP SIGNATURE-----

Merge tag 'arc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC architecture updates from Vineet Gupta:

 - support for HS38 cores based on ARCv2 ISA

     ARCv2 is the next generation ISA from Synopsys and basis for the
     HS3{4,6,8} families of processors which retain the traditional ARC mantra of
     low power and configurability and are now more performant and feature rich.

     HS38x is a 10 stage pipeline core which supports MMU (with huge pages) and
     SMP (upto 4 cores) among other features.

     + www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor
     + http://news.synopsys.com/2014-10-14-New-DesignWare-ARC-HS38-Processor-Doubles-Performance-for-Embedded-Linux-Applications
     + http://www.embedded.com/electronics-news/4435975/Synopsys-ARC-HS38-core-gives-2X-boost-to-Linux-based-apps

 - support for ARC SDP (Software Development platform): Main Board + CPU Cards
    = AXS101: CPU Card with ARC700 in silicon @ 700 MHz
    = AXS103: CPU Card with HS38x in FPGA

 - refactoring of ARCompact port to accomodate new ARCv2 ISA

 - misc updates/cleanups

* tag 'arc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (72 commits)
  ARC: Fix build failures for ARCompact in linux-next after ARCv2 support
  ARCv2: Allow older gcc to cope with new regime of ARCv2/ARCompact support
  ARCv2: [vdk] dts files and defconfig for HS38 VDK
  ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores
  ARC: [axs101] Prepare for AXS103
  ARCv2: [nsim*hs*] Support simulation platforms for HS38x cores
  ARCv2: All bits in place, allow ARCv2 builds
  ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency)
  ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelock
  ARC: Reduce bitops lines of code using macros
  ARCv2: barriers
  arch: conditionally define smp_{mb,rmb,wmb}
  ARC: add smp barriers around atomics per Documentation/atomic_ops.txt
  ARC: add compiler barrier to LLSC based cmpxchg
  ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distribution
  ARCv2: SMP: clocksource: Enable Global Real Time counter
  ARCv2: SMP: ARConnect debug/robustness
  ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al
  ARC: make plat_smp_ops weak to allow over-rides
  ARCv2: clocksource: Introduce 64bit local RTC counter
  ...
2015-07-01 09:24:26 -07:00
..
arcregs.h ARCv2: MMUv4: cache programming model changes 2015-06-22 14:06:55 +05:30
asm-offsets.h
atomic.h ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelock 2015-06-25 06:00:18 +05:30
barrier.h ARCv2: barriers 2015-06-25 06:00:17 +05:30
bitops.h ARC: Reduce bitops lines of code using macros 2015-06-25 06:00:18 +05:30
bug.h ARC: BUG() dumps stack after @msg (@msg now same as in generic BUG)) 2014-10-13 14:46:18 +05:30
cache.h ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency) 2015-06-25 06:00:19 +05:30
cacheflush.h ARC: fold ___flush_dcache_page into __flush_dcache_page 2015-05-19 11:27:13 +05:30
checksum.h ARC: Checksum/byteorder/swab routines 2013-02-11 20:00:34 +05:30
clk.h ARC: [DeviceTree] Convert some Kconfig items to runtime values 2013-02-15 23:15:56 +05:30
cmpxchg.h ARC: add smp barriers around atomics per Documentation/atomic_ops.txt 2015-06-25 06:00:16 +05:30
current.h ARC: remove extraneous __KERNEL__ guards 2014-10-13 14:46:20 +05:30
delay.h ARCv2: Adhere to Zero Delay loop restriction 2015-06-22 14:06:56 +05:30
disasm.h ARC: disassembly (needed by kprobes/kgdb/unaligned-access-emul) 2013-02-15 23:16:04 +05:30
dma-mapping.h ARC: remove the unused platform helpers from dma mapping API 2015-06-19 18:09:23 +05:30
dma.h ARC: I/O and DMA Mappings 2013-02-15 23:15:54 +05:30
elf.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
entry-arcv2.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
entry-compact.h ARC: intc: split into ARCompact ISA specific, common bits 2015-06-19 18:09:40 +05:30
entry.h ARCv2: STAR 9000808988: signals involving Delay Slot 2015-06-22 14:06:55 +05:30
exec.h ARC: Fundamental ARCH data-types/defines 2013-02-11 20:00:34 +05:30
futex.h sched/preempt, futex: Update comments to clarify that preemption doesn't have to be disabled 2015-05-19 08:39:17 +02:00
io.h - Support for HS38 cores based on ARCv2 ISA 2015-07-01 09:24:26 -07:00
irq.h ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al 2015-06-22 14:06:56 +05:30
irqflags-arcv2.h ARCv2: STAR 9000814690: Really Re-enable interrupts to avoid deadlocks 2015-06-22 14:06:55 +05:30
irqflags-compact.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
irqflags.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
Kbuild - Support for HS38 cores based on ARCv2 ISA 2015-07-01 09:24:26 -07:00
kdebug.h ARC: Fundamental ARCH data-types/defines 2013-02-11 20:00:34 +05:30
kgdb.h ARC: Update order of registers in KGDB to match GDB 7.5 2014-10-13 14:46:20 +05:30
kprobes.h ARC: Remove explicit passing around of ECR 2013-06-26 15:30:50 +05:30
linkage.h ARC: switch to generic ENTRY/END assembler annotations 2014-03-26 14:31:28 +05:30
mach_desc.h arc: use common of_flat_dt_match_machine 2013-10-09 20:03:55 -05:00
mcip.h ARCv2: SMP: clocksource: Enable Global Real Time counter 2015-06-22 14:06:57 +05:30
mm-arch-hooks.h mm: new mm hook framework 2015-06-24 17:49:41 -07:00
mmu_context.h ARC: [SMP] TLB flush 2013-11-06 10:41:45 +05:30
mmu.h ARCv2: MMUv4: TLB programming Model changes 2015-06-22 14:06:55 +05:30
module.h ARC: DWARF2 .debug_frame based stack unwinder 2013-02-15 23:16:03 +05:30
mutex.h ARC: SMP support 2013-02-15 23:16:02 +05:30
page.h ARC: [mm] Make stack/heap Non-executable by default 2013-06-22 19:23:20 +05:30
perf_event.h ARC: perf: support cache hit/miss ratio 2015-04-20 18:27:34 +05:30
pgalloc.h arc: handle pgtable_page_ctor() fail 2013-11-15 09:32:16 +09:00
pgtable.h ARCv2: MMUv4: TLB programming Model changes 2015-06-22 14:06:55 +05:30
processor.h ARC: mm: document system mem map clearly 2015-06-19 18:09:29 +05:30
ptrace.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
sections.h of/fdt: consolidate built-in dtb section variables 2014-04-30 00:59:13 -05:00
segment.h ARC: uaccess friends 2013-02-11 20:00:31 +05:30
serial.h ARC: Dynamically determine BASE_BAUD from DeviceTree 2015-02-02 17:08:37 +05:30
setup.h ARC: RIP @running_on_hw 2014-10-13 14:46:17 +05:30
shmparam.h ARC: [mm] Aliasing VIPT dcache support 4/4 2013-05-09 22:00:57 +05:30
smp.h ARC: Allow SMP kernel to build/boot on UP-only infrastructure 2014-09-27 14:49:01 +05:30
spinlock_types.h ARC: Code cosmetics (Nothing semantical) 2013-08-29 17:51:15 +05:30
spinlock.h ARC: add smp barriers around atomics per Documentation/atomic_ops.txt 2015-06-25 06:00:16 +05:30
stacktrace.h ARC: Make arc_unwind_core accessible externally 2015-02-27 10:15:00 +05:30
string.h ARC: remove extraneous __KERNEL__ guards 2014-10-13 14:46:20 +05:30
switch_to.h ARC: Process-creation/scheduling/idle-loop 2013-02-11 20:00:38 +05:30
syscall.h ARC: stop using pt_regs->orig_r8 2013-06-22 19:23:26 +05:30
syscalls.h ARC: remove extraneous __KERNEL__ guards 2014-10-13 14:46:20 +05:30
thread_info.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
timex.h ARC: Timers/counters/delay management 2013-02-11 20:00:39 +05:30
tlb-mmu1.h ARC: Disintegrate arcregs.h 2013-06-22 13:46:42 +05:30
tlb.h ARC: Disintegrate arcregs.h 2013-06-22 13:46:42 +05:30
tlbflush.h ARC: [SMP] TLB flush 2013-11-06 10:41:45 +05:30
uaccess.h ARCv2: Adhere to Zero Delay loop restriction 2015-06-22 14:06:56 +05:30
unaligned.h ARC: rename kconfig option for unaligned emulation 2014-10-13 14:46:15 +05:30
unwind.h ARC: DWARF2 .debug_frame based stack unwinder 2013-02-15 23:16:03 +05:30