forked from Minki/linux
b85d858b40
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Cc: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
162 lines
3.8 KiB
C
162 lines
3.8 KiB
C
/*
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* File: arch/blackfin/oprofile/op_model_bf533.c
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* Based on:
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* Author: Anton Blanchard <anton@au.ibm.com>
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*
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* Created:
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* Description:
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*
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* Modified:
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* Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
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* Copyright 2004-2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/oprofile.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/ptrace.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/system.h>
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#include <asm/processor.h>
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#include <asm/blackfin.h>
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#include "op_blackfin.h"
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#define PM_ENABLE 0x01;
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#define PM_CTL1_ENABLE 0x18
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#define PM_CTL0_ENABLE 0xC000
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#define COUNT_EDGE_ONLY 0x3000000
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static int oprofile_running;
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static unsigned curr_pfctl, curr_count[2];
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static int bfin533_reg_setup(struct op_counter_config *ctr)
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{
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unsigned int pfctl = ctr_read();
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unsigned int count[2];
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/* set Blackfin perf monitor regs with ctr */
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if (ctr[0].enabled) {
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pfctl |= (PM_CTL0_ENABLE | ((char)ctr[0].event << 5));
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count[0] = 0xFFFFFFFF - ctr[0].count;
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curr_count[0] = count[0];
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}
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if (ctr[1].enabled) {
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pfctl |= (PM_CTL1_ENABLE | ((char)ctr[1].event << 16));
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count[1] = 0xFFFFFFFF - ctr[1].count;
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curr_count[1] = count[1];
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}
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pr_debug("ctr[0].enabled=%d,ctr[1].enabled=%d,ctr[0].event<<5=0x%x,ctr[1].event<<16=0x%x\n", ctr[0].enabled, ctr[1].enabled, ctr[0].event << 5, ctr[1].event << 16);
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pfctl |= COUNT_EDGE_ONLY;
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curr_pfctl = pfctl;
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pr_debug("write 0x%x to pfctl\n", pfctl);
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ctr_write(pfctl);
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count_write(count);
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return 0;
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}
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static int bfin533_start(struct op_counter_config *ctr)
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{
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unsigned int pfctl = ctr_read();
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pfctl |= PM_ENABLE;
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curr_pfctl = pfctl;
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ctr_write(pfctl);
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oprofile_running = 1;
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pr_debug("start oprofile counter \n");
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return 0;
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}
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static void bfin533_stop(void)
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{
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int pfctl;
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pfctl = ctr_read();
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pfctl &= ~PM_ENABLE;
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/* freeze counters */
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ctr_write(pfctl);
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oprofile_running = 0;
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pr_debug("stop oprofile counter \n");
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}
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static int get_kernel(void)
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{
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int ipend, is_kernel;
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ipend = bfin_read_IPEND();
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/* test bit 15 */
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is_kernel = ((ipend & 0x8000) != 0);
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return is_kernel;
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}
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int pm_overflow_handler(int irq, struct pt_regs *regs)
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{
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int is_kernel;
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int i, cpu;
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unsigned int pc, pfctl;
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unsigned int count[2];
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pr_debug("get interrupt in %s\n", __func__);
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if (oprofile_running == 0) {
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pr_debug("error: entering interrupt when oprofile is stopped.\n\r");
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return -1;
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}
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is_kernel = get_kernel();
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cpu = smp_processor_id();
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pc = regs->pc;
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pfctl = ctr_read();
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/* read the two event counter regs */
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count_read(count);
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/* if the counter overflows, add sample to oprofile buffer */
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for (i = 0; i < 2; ++i) {
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if (oprofile_running) {
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oprofile_add_sample(regs, i);
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}
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}
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/* reset the perfmon counter */
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ctr_write(curr_pfctl);
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count_write(curr_count);
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return 0;
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}
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struct op_bfin533_model op_model_bfin533 = {
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.reg_setup = bfin533_reg_setup,
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.start = bfin533_start,
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.stop = bfin533_stop,
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.num_counters = 2,
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.name = "blackfin/bf533"
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};
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