forked from Minki/linux
087cdfb662
Debugging (hierarchical) interupt domains is tedious as there is no information about the hierarchy and no information about states of interrupts in the various domain levels. Add a debugfs directory 'irq' and subdirectories 'domains' and 'irqs'. The domains directory contains the domain files. The content is information about the domain. If the domain is part of a hierarchy then the parent domains are printed as well. # ls /sys/kernel/debug/irq/domains/ default INTEL-IR-2 INTEL-IR-MSI-2 IO-APIC-IR-2 PCI-MSI DMAR-MSI INTEL-IR-3 INTEL-IR-MSI-3 IO-APIC-IR-3 unknown-1 INTEL-IR-0 INTEL-IR-MSI-0 IO-APIC-IR-0 IO-APIC-IR-4 VECTOR INTEL-IR-1 INTEL-IR-MSI-1 IO-APIC-IR-1 PCI-HT # cat /sys/kernel/debug/irq/domains/VECTOR name: VECTOR size: 0 mapped: 216 flags: 0x00000041 # cat /sys/kernel/debug/irq/domains/IO-APIC-IR-0 name: IO-APIC-IR-0 size: 24 mapped: 19 flags: 0x00000041 parent: INTEL-IR-3 name: INTEL-IR-3 size: 65536 mapped: 167 flags: 0x00000041 parent: VECTOR name: VECTOR size: 0 mapped: 216 flags: 0x00000041 Unfortunately there is no per cpu information about the VECTOR domain (yet). The irqs directory contains detailed information about mapped interrupts. # cat /sys/kernel/debug/irq/irqs/3 handler: handle_edge_irq status: 0x00004000 istate: 0x00000000 ddepth: 1 wdepth: 0 dstate: 0x01018000 IRQD_IRQ_DISABLED IRQD_SINGLE_TARGET IRQD_MOVE_PCNTXT node: 0 affinity: 0-143 effectiv: 0 pending: domain: IO-APIC-IR-0 hwirq: 0x3 chip: IR-IO-APIC flags: 0x10 IRQCHIP_SKIP_SET_WAKE parent: domain: INTEL-IR-3 hwirq: 0x20000 chip: INTEL-IR flags: 0x0 parent: domain: VECTOR hwirq: 0x3 chip: APIC flags: 0x0 This was developed to simplify the debugging of the managed affinity changes. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jens Axboe <axboe@kernel.dk> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Keith Busch <keith.busch@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Christoph Hellwig <hch@lst.de> Link: http://lkml.kernel.org/r/20170619235444.537566163@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
216 lines
5.7 KiB
C
216 lines
5.7 KiB
C
/*
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* Copyright 2017 Thomas Gleixner <tglx@linutronix.de>
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*
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* This file is licensed under the GPL V2.
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*/
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#include <linux/debugfs.h>
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include "internals.h"
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static struct dentry *irq_dir;
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struct irq_bit_descr {
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unsigned int mask;
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char *name;
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};
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#define BIT_MASK_DESCR(m) { .mask = m, .name = #m }
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static void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
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const struct irq_bit_descr *sd, int size)
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{
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int i;
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for (i = 0; i < size; i++, sd++) {
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if (state & sd->mask)
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seq_printf(m, "%*s%s\n", ind + 12, "", sd->name);
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}
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}
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#ifdef CONFIG_SMP
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static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
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{
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struct irq_data *data = irq_desc_get_irq_data(desc);
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struct cpumask *msk;
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msk = irq_data_get_affinity_mask(data);
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seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk));
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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msk = desc->pending_mask;
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seq_printf(m, "pending: %*pbl\n", cpumask_pr_args(msk));
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#endif
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}
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#else
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static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
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#endif
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static const struct irq_bit_descr irqchip_flags[] = {
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BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
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BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
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BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
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BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
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BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
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BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
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BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
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};
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static void
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irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
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{
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struct irq_chip *chip = data->chip;
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if (!chip) {
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seq_printf(m, "chip: None\n");
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return;
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}
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seq_printf(m, "%*schip: %s\n", ind, "", chip->name);
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seq_printf(m, "%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
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irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
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ARRAY_SIZE(irqchip_flags));
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}
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static void
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irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
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{
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seq_printf(m, "%*sdomain: %s\n", ind, "",
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data->domain ? data->domain->name : "");
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seq_printf(m, "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq);
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irq_debug_show_chip(m, data, ind + 1);
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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if (!data->parent_data)
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return;
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seq_printf(m, "%*sparent:\n", ind + 1, "");
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irq_debug_show_data(m, data->parent_data, ind + 4);
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#endif
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}
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static const struct irq_bit_descr irqdata_states[] = {
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BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
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BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
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BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
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BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
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BIT_MASK_DESCR(IRQD_LEVEL),
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BIT_MASK_DESCR(IRQD_ACTIVATED),
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BIT_MASK_DESCR(IRQD_IRQ_STARTED),
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BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
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BIT_MASK_DESCR(IRQD_IRQ_MASKED),
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BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
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BIT_MASK_DESCR(IRQD_PER_CPU),
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BIT_MASK_DESCR(IRQD_NO_BALANCING),
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BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
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BIT_MASK_DESCR(IRQD_AFFINITY_SET),
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BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
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BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
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BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
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BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
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BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
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BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
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};
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static const struct irq_bit_descr irqdesc_states[] = {
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BIT_MASK_DESCR(_IRQ_NOPROBE),
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BIT_MASK_DESCR(_IRQ_NOREQUEST),
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BIT_MASK_DESCR(_IRQ_NOTHREAD),
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BIT_MASK_DESCR(_IRQ_NOAUTOEN),
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BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
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BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
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BIT_MASK_DESCR(_IRQ_IS_POLLED),
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BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
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};
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static const struct irq_bit_descr irqdesc_istates[] = {
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BIT_MASK_DESCR(IRQS_AUTODETECT),
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BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
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BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
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BIT_MASK_DESCR(IRQS_ONESHOT),
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BIT_MASK_DESCR(IRQS_REPLAY),
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BIT_MASK_DESCR(IRQS_WAITING),
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BIT_MASK_DESCR(IRQS_PENDING),
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BIT_MASK_DESCR(IRQS_SUSPENDED),
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};
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static int irq_debug_show(struct seq_file *m, void *p)
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{
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struct irq_desc *desc = m->private;
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struct irq_data *data;
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raw_spin_lock_irq(&desc->lock);
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data = irq_desc_get_irq_data(desc);
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seq_printf(m, "handler: %pf\n", desc->handle_irq);
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seq_printf(m, "status: 0x%08x\n", desc->status_use_accessors);
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irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states,
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ARRAY_SIZE(irqdesc_states));
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seq_printf(m, "istate: 0x%08x\n", desc->istate);
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irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates,
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ARRAY_SIZE(irqdesc_istates));
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seq_printf(m, "ddepth: %u\n", desc->depth);
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seq_printf(m, "wdepth: %u\n", desc->wake_depth);
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seq_printf(m, "dstate: 0x%08x\n", irqd_get(data));
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irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states,
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ARRAY_SIZE(irqdata_states));
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seq_printf(m, "node: %d\n", irq_data_get_node(data));
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irq_debug_show_masks(m, desc);
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irq_debug_show_data(m, data, 0);
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raw_spin_unlock_irq(&desc->lock);
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return 0;
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}
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static int irq_debug_open(struct inode *inode, struct file *file)
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{
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return single_open(file, irq_debug_show, inode->i_private);
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}
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static const struct file_operations dfs_irq_ops = {
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.open = irq_debug_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
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{
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char name [10];
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if (!irq_dir || !desc || desc->debugfs_file)
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return;
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sprintf(name, "%d", irq);
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desc->debugfs_file = debugfs_create_file(name, 0444, irq_dir, desc,
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&dfs_irq_ops);
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}
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void irq_remove_debugfs_entry(struct irq_desc *desc)
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{
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if (desc->debugfs_file)
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debugfs_remove(desc->debugfs_file);
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}
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static int __init irq_debugfs_init(void)
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{
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struct dentry *root_dir;
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int irq;
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root_dir = debugfs_create_dir("irq", NULL);
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if (!root_dir)
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return -ENOMEM;
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irq_domain_debugfs_init(root_dir);
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irq_dir = debugfs_create_dir("irqs", root_dir);
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irq_lock_sparse();
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for_each_active_irq(irq)
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irq_add_debugfs_entry(irq, irq_to_desc(irq));
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irq_unlock_sparse();
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return 0;
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}
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__initcall(irq_debugfs_init);
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