forked from Minki/linux
297b9cebd2
Add support for using the caam/jr backend on DPAA2-based SoCs. These have some particularities we have to account for: -HW S/G format is different -Management Complex (MC) firmware initializes / manages (partially) the CAAM block: MCFGR, QI enablement in QICTL, RNG Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
82 lines
3.0 KiB
C
82 lines
3.0 KiB
C
/*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the names of the above-listed copyright holders nor the
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* names of any contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SG_SW_QM2_H_
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#define _SG_SW_QM2_H_
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#include "../../../drivers/staging/fsl-mc/include/dpaa2-fd.h"
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static inline void dma_to_qm_sg_one(struct dpaa2_sg_entry *qm_sg_ptr,
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dma_addr_t dma, u32 len, u16 offset)
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{
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dpaa2_sg_set_addr(qm_sg_ptr, dma);
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dpaa2_sg_set_format(qm_sg_ptr, dpaa2_sg_single);
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dpaa2_sg_set_final(qm_sg_ptr, false);
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dpaa2_sg_set_len(qm_sg_ptr, len);
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dpaa2_sg_set_bpid(qm_sg_ptr, 0);
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dpaa2_sg_set_offset(qm_sg_ptr, offset);
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}
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/*
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* convert scatterlist to h/w link table format
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* but does not have final bit; instead, returns last entry
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*/
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static inline struct dpaa2_sg_entry *
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sg_to_qm_sg(struct scatterlist *sg, int sg_count,
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struct dpaa2_sg_entry *qm_sg_ptr, u16 offset)
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{
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while (sg_count && sg) {
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dma_to_qm_sg_one(qm_sg_ptr, sg_dma_address(sg),
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sg_dma_len(sg), offset);
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qm_sg_ptr++;
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sg = sg_next(sg);
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sg_count--;
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}
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return qm_sg_ptr - 1;
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}
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/*
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* convert scatterlist to h/w link table format
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* scatterlist must have been previously dma mapped
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*/
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static inline void sg_to_qm_sg_last(struct scatterlist *sg, int sg_count,
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struct dpaa2_sg_entry *qm_sg_ptr,
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u16 offset)
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{
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qm_sg_ptr = sg_to_qm_sg(sg, sg_count, qm_sg_ptr, offset);
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dpaa2_sg_set_final(qm_sg_ptr, true);
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}
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#endif /* _SG_SW_QM2_H_ */
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