forked from Minki/linux
659d8a6231
The Rapid General-Purpose Input and Output with 2 Ports (RGPIO2P) on MX7ULP is similar to GPIO on Vibrid. But unlike Vibrid, the RGPIO2P has an extra Port Data Direction Register (PDDR) used to configure the individual port pins for input or output. We introduce a bool have_paddr with fsl_gpio_soc_data data to distinguish this differences. And we support getting the output status by checking the GPIO direction in PDDR. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Peter Chen <peter.chen@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
328 lines
8.2 KiB
C
328 lines
8.2 KiB
C
/*
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* Freescale vf610 GPIO support through PORT and GPIO
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*
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* Copyright (c) 2014 Toradex AG.
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*
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* Author: Stefan Agner <stefan@agner.ch>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#define VF610_GPIO_PER_PORT 32
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struct fsl_gpio_soc_data {
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/* SoCs has a Port Data Direction Register (PDDR) */
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bool have_paddr;
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};
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struct vf610_gpio_port {
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struct gpio_chip gc;
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void __iomem *base;
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void __iomem *gpio_base;
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const struct fsl_gpio_soc_data *sdata;
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u8 irqc[VF610_GPIO_PER_PORT];
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int irq;
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};
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#define GPIO_PDOR 0x00
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#define GPIO_PSOR 0x04
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#define GPIO_PCOR 0x08
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#define GPIO_PTOR 0x0c
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#define GPIO_PDIR 0x10
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#define GPIO_PDDR 0x14
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#define PORT_PCR(n) ((n) * 0x4)
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#define PORT_PCR_IRQC_OFFSET 16
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#define PORT_ISFR 0xa0
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#define PORT_DFER 0xc0
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#define PORT_DFCR 0xc4
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#define PORT_DFWR 0xc8
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#define PORT_INT_OFF 0x0
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#define PORT_INT_LOGIC_ZERO 0x8
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#define PORT_INT_RISING_EDGE 0x9
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#define PORT_INT_FALLING_EDGE 0xa
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#define PORT_INT_EITHER_EDGE 0xb
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#define PORT_INT_LOGIC_ONE 0xc
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static struct irq_chip vf610_gpio_irq_chip;
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static const struct fsl_gpio_soc_data imx_data = {
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.have_paddr = true,
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};
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static const struct of_device_id vf610_gpio_dt_ids[] = {
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{ .compatible = "fsl,vf610-gpio", .data = NULL, },
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{ .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, },
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{ /* sentinel */ }
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};
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static inline void vf610_gpio_writel(u32 val, void __iomem *reg)
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{
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writel_relaxed(val, reg);
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}
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static inline u32 vf610_gpio_readl(void __iomem *reg)
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{
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return readl_relaxed(reg);
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}
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static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
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{
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struct vf610_gpio_port *port = gpiochip_get_data(gc);
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unsigned long mask = BIT(gpio);
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void __iomem *addr;
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if (port->sdata && port->sdata->have_paddr) {
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mask &= vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
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addr = mask ? port->gpio_base + GPIO_PDOR :
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port->gpio_base + GPIO_PDIR;
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return !!(vf610_gpio_readl(addr) & BIT(gpio));
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} else {
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return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR)
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& BIT(gpio));
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}
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}
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static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct vf610_gpio_port *port = gpiochip_get_data(gc);
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unsigned long mask = BIT(gpio);
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if (val)
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vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR);
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else
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vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR);
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}
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static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
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{
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struct vf610_gpio_port *port = gpiochip_get_data(chip);
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unsigned long mask = BIT(gpio);
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u32 val;
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if (port->sdata && port->sdata->have_paddr) {
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val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
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val &= ~mask;
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vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR);
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}
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return pinctrl_gpio_direction_input(chip->base + gpio);
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}
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static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
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int value)
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{
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struct vf610_gpio_port *port = gpiochip_get_data(chip);
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unsigned long mask = BIT(gpio);
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if (port->sdata && port->sdata->have_paddr)
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vf610_gpio_writel(mask, port->gpio_base + GPIO_PDDR);
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vf610_gpio_set(chip, gpio, value);
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return pinctrl_gpio_direction_output(chip->base + gpio);
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}
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static void vf610_gpio_irq_handler(struct irq_desc *desc)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_desc_get_handler_data(desc));
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struct irq_chip *chip = irq_desc_get_chip(desc);
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int pin;
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unsigned long irq_isfr;
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chained_irq_enter(chip, desc);
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irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR);
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for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
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vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
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generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));
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}
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chained_irq_exit(chip, desc);
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}
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static void vf610_gpio_irq_ack(struct irq_data *d)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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int gpio = d->hwirq;
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vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR);
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}
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static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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u8 irqc;
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switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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irqc = PORT_INT_RISING_EDGE;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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irqc = PORT_INT_FALLING_EDGE;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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irqc = PORT_INT_EITHER_EDGE;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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irqc = PORT_INT_LOGIC_ZERO;
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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irqc = PORT_INT_LOGIC_ONE;
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break;
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default:
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return -EINVAL;
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}
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port->irqc[d->hwirq] = irqc;
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if (type & IRQ_TYPE_LEVEL_MASK)
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irq_set_handler_locked(d, handle_level_irq);
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else
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irq_set_handler_locked(d, handle_edge_irq);
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return 0;
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}
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static void vf610_gpio_irq_mask(struct irq_data *d)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
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vf610_gpio_writel(0, pcr_base);
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}
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static void vf610_gpio_irq_unmask(struct irq_data *d)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
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vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET,
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pcr_base);
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}
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static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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if (enable)
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enable_irq_wake(port->irq);
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else
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disable_irq_wake(port->irq);
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return 0;
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}
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static struct irq_chip vf610_gpio_irq_chip = {
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.name = "gpio-vf610",
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.irq_ack = vf610_gpio_irq_ack,
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.irq_mask = vf610_gpio_irq_mask,
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.irq_unmask = vf610_gpio_irq_unmask,
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.irq_set_type = vf610_gpio_irq_set_type,
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.irq_set_wake = vf610_gpio_irq_set_wake,
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};
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static int vf610_gpio_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id = of_match_device(vf610_gpio_dt_ids,
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&pdev->dev);
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct vf610_gpio_port *port;
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struct resource *iores;
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struct gpio_chip *gc;
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int ret;
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port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
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if (!port)
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return -ENOMEM;
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port->sdata = of_id->data;
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iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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port->base = devm_ioremap_resource(dev, iores);
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if (IS_ERR(port->base))
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return PTR_ERR(port->base);
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iores = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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port->gpio_base = devm_ioremap_resource(dev, iores);
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if (IS_ERR(port->gpio_base))
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return PTR_ERR(port->gpio_base);
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port->irq = platform_get_irq(pdev, 0);
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if (port->irq < 0)
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return port->irq;
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gc = &port->gc;
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gc->of_node = np;
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gc->parent = dev;
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gc->label = "vf610-gpio";
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gc->ngpio = VF610_GPIO_PER_PORT;
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gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
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gc->request = gpiochip_generic_request;
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gc->free = gpiochip_generic_free;
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gc->direction_input = vf610_gpio_direction_input;
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gc->get = vf610_gpio_get;
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gc->direction_output = vf610_gpio_direction_output;
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gc->set = vf610_gpio_set;
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ret = gpiochip_add_data(gc, port);
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if (ret < 0)
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return ret;
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/* Clear the interrupt status register for all GPIO's */
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vf610_gpio_writel(~0, port->base + PORT_ISFR);
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ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0,
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handle_edge_irq, IRQ_TYPE_NONE);
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if (ret) {
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dev_err(dev, "failed to add irqchip\n");
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gpiochip_remove(gc);
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return ret;
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}
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gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq,
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vf610_gpio_irq_handler);
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return 0;
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}
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static struct platform_driver vf610_gpio_driver = {
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.driver = {
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.name = "gpio-vf610",
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.of_match_table = vf610_gpio_dt_ids,
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},
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.probe = vf610_gpio_probe,
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};
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builtin_platform_driver(vf610_gpio_driver);
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