Chris Wilson 06348d3086 drm/i915/ringbuffer: Move double invalidate to after pd flush ... Continuing the fun of trying to find exactly the delay that is sufficient to ensure that the page directory is fully loaded between context switches, move the extra flush added in commit 70b73f9ac1 ("drm/i915/ringbuffer: Delay after invalidating gen6+ xcs") to just after we flush the pd. Entirely based on the empirical data of running failing tests in a loop until we survive a day (before the mtbf is 10-30 minutes). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107769 References: 70b73f9ac1 ("drm/i915/ringbuffer: Delay after invalidating gen6+ xcs") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180904063802.13880-1-chris@chris-wilson.co.uk		2018-09-04 14:28:51 +01:00
..
drm	drm/i915/ringbuffer: Move double invalidate to after pd flush	2018-09-04 14:28:51 +01:00
host1x	drm for v4.18-rc1	2018-06-06 08:16:33 -07:00
ipu-v3
vga	docs: Fix some broken references	2018-06-15 18:10:01 -03:00
Makefile