forked from Minki/linux
9d56dd3b08
The old ctrl in/out routines are non-portable and unsuitable for cross-platform use. While drivers/sh has already been sanitized, there is still quite a lot of code that is not. This converts the arch/sh/ bits over, which permits us to flag the routines as deprecated whilst still building with -Werror for the architecture code, and to ensure that future users are not added. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
368 lines
9.5 KiB
C
368 lines
9.5 KiB
C
/*
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* linux/arch/sh/boards/superh/microdev/io.c
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*
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* Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
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* Copyright (C) 2003, 2004 SuperH, Inc.
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* Copyright (C) 2004 Paul Mundt
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*
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* SuperH SH4-202 MicroDev board support.
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/wait.h>
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#include <asm/io.h>
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#include <mach/microdev.h>
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/*
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* we need to have a 'safe' address to re-direct all I/O requests
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* that we do not explicitly wish to handle. This safe address
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* must have the following properies:
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*
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* * writes are ignored (no exception)
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* * reads are benign (no side-effects)
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* * accesses of width 1, 2 and 4-bytes are all valid.
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*
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* The Processor Version Register (PVR) has these properties.
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*/
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#define PVR 0xff000030 /* Processor Version Register */
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#define IO_IDE2_BASE 0x170ul /* I/O base for SMSC FDC37C93xAPM IDE #2 */
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#define IO_IDE1_BASE 0x1f0ul /* I/O base for SMSC FDC37C93xAPM IDE #1 */
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#define IO_ISP1161_BASE 0x290ul /* I/O port for Philips ISP1161x USB chip */
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#define IO_SERIAL2_BASE 0x2f8ul /* I/O base for SMSC FDC37C93xAPM Serial #2 */
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#define IO_LAN91C111_BASE 0x300ul /* I/O base for SMSC LAN91C111 Ethernet chip */
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#define IO_IDE2_MISC 0x376ul /* I/O misc for SMSC FDC37C93xAPM IDE #2 */
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#define IO_SUPERIO_BASE 0x3f0ul /* I/O base for SMSC FDC37C93xAPM SuperIO chip */
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#define IO_IDE1_MISC 0x3f6ul /* I/O misc for SMSC FDC37C93xAPM IDE #1 */
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#define IO_SERIAL1_BASE 0x3f8ul /* I/O base for SMSC FDC37C93xAPM Serial #1 */
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#define IO_ISP1161_EXTENT 0x04ul /* I/O extent for Philips ISP1161x USB chip */
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#define IO_LAN91C111_EXTENT 0x10ul /* I/O extent for SMSC LAN91C111 Ethernet chip */
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#define IO_SUPERIO_EXTENT 0x02ul /* I/O extent for SMSC FDC37C93xAPM SuperIO chip */
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#define IO_IDE_EXTENT 0x08ul /* I/O extent for IDE Task Register set */
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#define IO_SERIAL_EXTENT 0x10ul
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#define IO_LAN91C111_PHYS 0xa7500000ul /* Physical address of SMSC LAN91C111 Ethernet chip */
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#define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */
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#define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */
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/*
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* map I/O ports to memory-mapped addresses
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*/
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static unsigned long microdev_isa_port2addr(unsigned long offset)
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{
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unsigned long result;
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if ((offset >= IO_LAN91C111_BASE) &&
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(offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {
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/*
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* SMSC LAN91C111 Ethernet chip
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*/
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result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE;
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} else if ((offset >= IO_SUPERIO_BASE) &&
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(offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) {
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/*
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* SMSC FDC37C93xAPM SuperIO chip
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*
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* Configuration Registers
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*/
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result = IO_SUPERIO_PHYS + (offset << 1);
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#if 0
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} else if (offset == KBD_DATA_REG || offset == KBD_CNTL_REG ||
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offset == KBD_STATUS_REG) {
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/*
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* SMSC FDC37C93xAPM SuperIO chip
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*
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* PS/2 Keyboard + Mouse (ports 0x60 and 0x64).
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*/
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result = IO_SUPERIO_PHYS + (offset << 1);
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#endif
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} else if (((offset >= IO_IDE1_BASE) &&
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(offset < IO_IDE1_BASE + IO_IDE_EXTENT)) ||
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(offset == IO_IDE1_MISC)) {
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/*
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* SMSC FDC37C93xAPM SuperIO chip
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*
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* IDE #1
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*/
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result = IO_SUPERIO_PHYS + (offset << 1);
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} else if (((offset >= IO_IDE2_BASE) &&
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(offset < IO_IDE2_BASE + IO_IDE_EXTENT)) ||
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(offset == IO_IDE2_MISC)) {
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/*
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* SMSC FDC37C93xAPM SuperIO chip
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*
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* IDE #2
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*/
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result = IO_SUPERIO_PHYS + (offset << 1);
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} else if ((offset >= IO_SERIAL1_BASE) &&
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(offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) {
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/*
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* SMSC FDC37C93xAPM SuperIO chip
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*
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* Serial #1
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*/
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result = IO_SUPERIO_PHYS + (offset << 1);
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} else if ((offset >= IO_SERIAL2_BASE) &&
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(offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) {
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/*
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* SMSC FDC37C93xAPM SuperIO chip
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*
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* Serial #2
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*/
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result = IO_SUPERIO_PHYS + (offset << 1);
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} else if ((offset >= IO_ISP1161_BASE) &&
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(offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) {
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/*
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* Philips USB ISP1161x chip
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*/
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result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE;
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} else {
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/*
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* safe default.
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*/
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printk("Warning: unexpected port in %s( offset = 0x%lx )\n",
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__func__, offset);
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result = PVR;
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}
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return result;
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}
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#define PORT2ADDR(x) (microdev_isa_port2addr(x))
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static inline void delay(void)
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{
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#if defined(CONFIG_PCI)
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/* System board present, just make a dummy SRAM access. (CS0 will be
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mapped to PCI memory, probably good to avoid it.) */
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__raw_readw(0xa6800000);
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#else
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/* CS0 will be mapped to flash, ROM etc so safe to access it. */
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__raw_readw(0xa0000000);
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#endif
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}
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unsigned char microdev_inb(unsigned long port)
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{
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#ifdef CONFIG_PCI
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if (port >= PCIBIOS_MIN_IO)
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return microdev_pci_inb(port);
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#endif
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return *(volatile unsigned char*)PORT2ADDR(port);
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}
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unsigned short microdev_inw(unsigned long port)
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{
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#ifdef CONFIG_PCI
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if (port >= PCIBIOS_MIN_IO)
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return microdev_pci_inw(port);
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#endif
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return *(volatile unsigned short*)PORT2ADDR(port);
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}
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unsigned int microdev_inl(unsigned long port)
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{
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#ifdef CONFIG_PCI
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if (port >= PCIBIOS_MIN_IO)
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return microdev_pci_inl(port);
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#endif
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return *(volatile unsigned int*)PORT2ADDR(port);
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}
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void microdev_outw(unsigned short b, unsigned long port)
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{
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#ifdef CONFIG_PCI
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if (port >= PCIBIOS_MIN_IO) {
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microdev_pci_outw(b, port);
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return;
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}
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#endif
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*(volatile unsigned short*)PORT2ADDR(port) = b;
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}
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void microdev_outb(unsigned char b, unsigned long port)
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{
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#ifdef CONFIG_PCI
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if (port >= PCIBIOS_MIN_IO) {
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microdev_pci_outb(b, port);
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return;
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}
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#endif
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/*
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* There is a board feature with the current SH4-202 MicroDev in
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* that the 2 byte enables (nBE0 and nBE1) are tied together (and
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* to the Chip Select Line (Ethernet_CS)). Due to this connectivity,
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* it is not possible to safely perform 8-bit writes to the
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* Ethernet registers, as 16-bits will be consumed from the Data
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* lines (corrupting the other byte). Hence, this function is
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* written to implement 16-bit read/modify/write for all byte-wide
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* accesses.
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*
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* Note: there is no problem with byte READS (even or odd).
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*
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* Sean McGoogan - 16th June 2003.
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*/
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if ((port >= IO_LAN91C111_BASE) &&
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(port < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {
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/*
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* Then are trying to perform a byte-write to the
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* LAN91C111. This needs special care.
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*/
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if (port % 2 == 1) { /* is the port odd ? */
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/* unset bit-0, i.e. make even */
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const unsigned long evenPort = port-1;
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unsigned short word;
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/*
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* do a 16-bit read/write to write to 'port',
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* preserving even byte.
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*
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* Even addresses are bits 0-7
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* Odd addresses are bits 8-15
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*/
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word = microdev_inw(evenPort);
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word = (word & 0xffu) | (b << 8);
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microdev_outw(word, evenPort);
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} else {
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/* else, we are trying to do an even byte write */
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unsigned short word;
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/*
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* do a 16-bit read/write to write to 'port',
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* preserving odd byte.
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*
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* Even addresses are bits 0-7
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* Odd addresses are bits 8-15
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*/
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word = microdev_inw(port);
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word = (word & 0xff00u) | (b);
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microdev_outw(word, port);
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}
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} else {
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*(volatile unsigned char*)PORT2ADDR(port) = b;
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}
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}
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void microdev_outl(unsigned int b, unsigned long port)
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{
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#ifdef CONFIG_PCI
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if (port >= PCIBIOS_MIN_IO) {
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microdev_pci_outl(b, port);
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return;
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}
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#endif
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*(volatile unsigned int*)PORT2ADDR(port) = b;
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}
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unsigned char microdev_inb_p(unsigned long port)
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{
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unsigned char v = microdev_inb(port);
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delay();
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return v;
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}
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unsigned short microdev_inw_p(unsigned long port)
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{
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unsigned short v = microdev_inw(port);
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delay();
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return v;
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}
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unsigned int microdev_inl_p(unsigned long port)
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{
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unsigned int v = microdev_inl(port);
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delay();
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return v;
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}
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void microdev_outb_p(unsigned char b, unsigned long port)
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{
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microdev_outb(b, port);
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delay();
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}
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void microdev_outw_p(unsigned short b, unsigned long port)
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{
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microdev_outw(b, port);
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delay();
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}
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void microdev_outl_p(unsigned int b, unsigned long port)
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{
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microdev_outl(b, port);
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delay();
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}
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void microdev_insb(unsigned long port, void *buffer, unsigned long count)
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{
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volatile unsigned char *port_addr;
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unsigned char *buf = buffer;
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port_addr = (volatile unsigned char *)PORT2ADDR(port);
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while (count--)
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*buf++ = *port_addr;
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}
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void microdev_insw(unsigned long port, void *buffer, unsigned long count)
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{
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volatile unsigned short *port_addr;
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unsigned short *buf = buffer;
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port_addr = (volatile unsigned short *)PORT2ADDR(port);
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while (count--)
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*buf++ = *port_addr;
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}
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void microdev_insl(unsigned long port, void *buffer, unsigned long count)
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{
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volatile unsigned long *port_addr;
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unsigned int *buf = buffer;
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port_addr = (volatile unsigned long *)PORT2ADDR(port);
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while (count--)
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*buf++ = *port_addr;
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}
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void microdev_outsb(unsigned long port, const void *buffer, unsigned long count)
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{
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volatile unsigned char *port_addr;
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const unsigned char *buf = buffer;
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port_addr = (volatile unsigned char *)PORT2ADDR(port);
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while (count--)
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*port_addr = *buf++;
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}
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void microdev_outsw(unsigned long port, const void *buffer, unsigned long count)
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{
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volatile unsigned short *port_addr;
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const unsigned short *buf = buffer;
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port_addr = (volatile unsigned short *)PORT2ADDR(port);
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while (count--)
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*port_addr = *buf++;
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}
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void microdev_outsl(unsigned long port, const void *buffer, unsigned long count)
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{
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volatile unsigned long *port_addr;
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const unsigned int *buf = buffer;
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port_addr = (volatile unsigned long *)PORT2ADDR(port);
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while (count--)
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*port_addr = *buf++;
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}
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