forked from Minki/linux
b9cdbe6e39
The PCI bus specification (rev 3.0, 3.2.5 "Transaction Ordering and Posting") defines rules for PCI configuration space transactions ordering and posting, that state that configuration writes have to be non-posted transactions. Current ioremap interface on ARM provides mapping functions that provide "bufferable" writes transactions (ie ioremap uses MT_DEVICE memory type) aka posted writes, so PCI host controller drivers have no arch interface to remap PCI configuration space with memory attributes that comply with the PCI specifications for configuration space. Implement an ARM specific pci_remap_cfgspace() interface that allows to map PCI config memory regions with MT_UNCACHED memory type (ie strongly ordered - non-posted writes), providing a remap function that complies with PCI specifications for config space transactions. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@armlinux.org.uk>
500 lines
12 KiB
C
500 lines
12 KiB
C
/*
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* linux/arch/arm/mm/ioremap.c
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*
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* Re-map IO memory to kernel address space so that we can access it.
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*
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* (C) Copyright 1995 1996 Linus Torvalds
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*
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* Hacked for ARM by Phil Blundell <philb@gnu.org>
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* Hacked to allow all architectures to build, and various cleanups
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* by Russell King
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*
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* This allows a driver to remap an arbitrary region of bus memory into
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* virtual space. One should *only* use readl, writel, memcpy_toio and
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* so on with such remapped areas.
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*
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* Because the ARM only has a 32-bit address space we can't address the
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* whole of the (physical) PCI space at once. PCI huge-mode addressing
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* allows us to circumvent this restriction by splitting PCI space into
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* two 2GB chunks and mapping only one at a time into processor memory.
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* We use MMU protection domains to trap any attempt to access the bank
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* that is not currently mapped. (This isn't fully implemented yet.)
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*/
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <linux/vmalloc.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#include <asm/cp15.h>
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#include <asm/cputype.h>
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#include <asm/cacheflush.h>
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#include <asm/early_ioremap.h>
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#include <asm/mmu_context.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/system_info.h>
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#include <asm/mach/map.h>
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#include <asm/mach/pci.h>
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#include "mm.h"
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LIST_HEAD(static_vmlist);
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static struct static_vm *find_static_vm_paddr(phys_addr_t paddr,
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size_t size, unsigned int mtype)
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{
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struct static_vm *svm;
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struct vm_struct *vm;
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list_for_each_entry(svm, &static_vmlist, list) {
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vm = &svm->vm;
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if (!(vm->flags & VM_ARM_STATIC_MAPPING))
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continue;
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if ((vm->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
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continue;
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if (vm->phys_addr > paddr ||
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paddr + size - 1 > vm->phys_addr + vm->size - 1)
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continue;
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return svm;
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}
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return NULL;
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}
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struct static_vm *find_static_vm_vaddr(void *vaddr)
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{
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struct static_vm *svm;
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struct vm_struct *vm;
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list_for_each_entry(svm, &static_vmlist, list) {
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vm = &svm->vm;
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/* static_vmlist is ascending order */
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if (vm->addr > vaddr)
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break;
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if (vm->addr <= vaddr && vm->addr + vm->size > vaddr)
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return svm;
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}
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return NULL;
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}
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void __init add_static_vm_early(struct static_vm *svm)
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{
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struct static_vm *curr_svm;
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struct vm_struct *vm;
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void *vaddr;
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vm = &svm->vm;
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vm_area_add_early(vm);
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vaddr = vm->addr;
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list_for_each_entry(curr_svm, &static_vmlist, list) {
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vm = &curr_svm->vm;
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if (vm->addr > vaddr)
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break;
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}
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list_add_tail(&svm->list, &curr_svm->list);
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}
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int ioremap_page(unsigned long virt, unsigned long phys,
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const struct mem_type *mtype)
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{
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return ioremap_page_range(virt, virt + PAGE_SIZE, phys,
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__pgprot(mtype->prot_pte));
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}
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EXPORT_SYMBOL(ioremap_page);
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void __check_vmalloc_seq(struct mm_struct *mm)
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{
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unsigned int seq;
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do {
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seq = init_mm.context.vmalloc_seq;
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memcpy(pgd_offset(mm, VMALLOC_START),
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pgd_offset_k(VMALLOC_START),
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sizeof(pgd_t) * (pgd_index(VMALLOC_END) -
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pgd_index(VMALLOC_START)));
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mm->context.vmalloc_seq = seq;
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} while (seq != init_mm.context.vmalloc_seq);
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}
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#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
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/*
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* Section support is unsafe on SMP - If you iounmap and ioremap a region,
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* the other CPUs will not see this change until their next context switch.
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* Meanwhile, (eg) if an interrupt comes in on one of those other CPUs
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* which requires the new ioremap'd region to be referenced, the CPU will
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* reference the _old_ region.
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*
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* Note that get_vm_area_caller() allocates a guard 4K page, so we need to
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* mask the size back to 1MB aligned or we will overflow in the loop below.
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*/
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static void unmap_area_sections(unsigned long virt, unsigned long size)
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{
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unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1));
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmdp;
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flush_cache_vunmap(addr, end);
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pgd = pgd_offset_k(addr);
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pud = pud_offset(pgd, addr);
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pmdp = pmd_offset(pud, addr);
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do {
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pmd_t pmd = *pmdp;
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if (!pmd_none(pmd)) {
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/*
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* Clear the PMD from the page table, and
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* increment the vmalloc sequence so others
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* notice this change.
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*
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* Note: this is still racy on SMP machines.
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*/
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pmd_clear(pmdp);
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init_mm.context.vmalloc_seq++;
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/*
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* Free the page table, if there was one.
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*/
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if ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_TABLE)
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pte_free_kernel(&init_mm, pmd_page_vaddr(pmd));
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}
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addr += PMD_SIZE;
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pmdp += 2;
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} while (addr < end);
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/*
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* Ensure that the active_mm is up to date - we want to
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* catch any use-after-iounmap cases.
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*/
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if (current->active_mm->context.vmalloc_seq != init_mm.context.vmalloc_seq)
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__check_vmalloc_seq(current->active_mm);
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flush_tlb_kernel_range(virt, end);
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}
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static int
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remap_area_sections(unsigned long virt, unsigned long pfn,
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size_t size, const struct mem_type *type)
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{
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unsigned long addr = virt, end = virt + size;
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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/*
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* Remove and free any PTE-based mapping, and
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* sync the current kernel mapping.
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*/
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unmap_area_sections(virt, size);
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pgd = pgd_offset_k(addr);
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pud = pud_offset(pgd, addr);
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pmd = pmd_offset(pud, addr);
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do {
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pmd[0] = __pmd(__pfn_to_phys(pfn) | type->prot_sect);
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pfn += SZ_1M >> PAGE_SHIFT;
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pmd[1] = __pmd(__pfn_to_phys(pfn) | type->prot_sect);
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pfn += SZ_1M >> PAGE_SHIFT;
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flush_pmd_entry(pmd);
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addr += PMD_SIZE;
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pmd += 2;
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} while (addr < end);
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return 0;
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}
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static int
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remap_area_supersections(unsigned long virt, unsigned long pfn,
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size_t size, const struct mem_type *type)
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{
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unsigned long addr = virt, end = virt + size;
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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/*
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* Remove and free any PTE-based mapping, and
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* sync the current kernel mapping.
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*/
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unmap_area_sections(virt, size);
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pgd = pgd_offset_k(virt);
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pud = pud_offset(pgd, addr);
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pmd = pmd_offset(pud, addr);
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do {
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unsigned long super_pmd_val, i;
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super_pmd_val = __pfn_to_phys(pfn) | type->prot_sect |
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PMD_SECT_SUPER;
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super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20;
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for (i = 0; i < 8; i++) {
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pmd[0] = __pmd(super_pmd_val);
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pmd[1] = __pmd(super_pmd_val);
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flush_pmd_entry(pmd);
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addr += PMD_SIZE;
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pmd += 2;
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}
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pfn += SUPERSECTION_SIZE >> PAGE_SHIFT;
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} while (addr < end);
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return 0;
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}
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#endif
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static void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
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unsigned long offset, size_t size, unsigned int mtype, void *caller)
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{
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const struct mem_type *type;
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int err;
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unsigned long addr;
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struct vm_struct *area;
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phys_addr_t paddr = __pfn_to_phys(pfn);
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#ifndef CONFIG_ARM_LPAE
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/*
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* High mappings must be supersection aligned
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*/
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if (pfn >= 0x100000 && (paddr & ~SUPERSECTION_MASK))
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return NULL;
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#endif
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type = get_mem_type(mtype);
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if (!type)
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return NULL;
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/*
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* Page align the mapping size, taking account of any offset.
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*/
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size = PAGE_ALIGN(offset + size);
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/*
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* Try to reuse one of the static mapping whenever possible.
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*/
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if (size && !(sizeof(phys_addr_t) == 4 && pfn >= 0x100000)) {
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struct static_vm *svm;
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svm = find_static_vm_paddr(paddr, size, mtype);
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if (svm) {
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addr = (unsigned long)svm->vm.addr;
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addr += paddr - svm->vm.phys_addr;
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return (void __iomem *) (offset + addr);
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}
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}
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/*
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* Don't allow RAM to be mapped with mismatched attributes - this
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* causes problems with ARMv6+
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*/
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if (WARN_ON(pfn_valid(pfn) && mtype != MT_MEMORY_RW))
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return NULL;
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area = get_vm_area_caller(size, VM_IOREMAP, caller);
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if (!area)
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return NULL;
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addr = (unsigned long)area->addr;
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area->phys_addr = paddr;
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#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
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if (DOMAIN_IO == 0 &&
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(((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) ||
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cpu_is_xsc3()) && pfn >= 0x100000 &&
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!((paddr | size | addr) & ~SUPERSECTION_MASK)) {
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area->flags |= VM_ARM_SECTION_MAPPING;
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err = remap_area_supersections(addr, pfn, size, type);
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} else if (!((paddr | size | addr) & ~PMD_MASK)) {
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area->flags |= VM_ARM_SECTION_MAPPING;
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err = remap_area_sections(addr, pfn, size, type);
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} else
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#endif
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err = ioremap_page_range(addr, addr + size, paddr,
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__pgprot(type->prot_pte));
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if (err) {
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vunmap((void *)addr);
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return NULL;
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}
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flush_cache_vmap(addr, addr + size);
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return (void __iomem *) (offset + addr);
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}
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void __iomem *__arm_ioremap_caller(phys_addr_t phys_addr, size_t size,
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unsigned int mtype, void *caller)
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{
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phys_addr_t last_addr;
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unsigned long offset = phys_addr & ~PAGE_MASK;
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unsigned long pfn = __phys_to_pfn(phys_addr);
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/*
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* Don't allow wraparound or zero size
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*/
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last_addr = phys_addr + size - 1;
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if (!size || last_addr < phys_addr)
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return NULL;
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return __arm_ioremap_pfn_caller(pfn, offset, size, mtype,
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caller);
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}
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/*
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* Remap an arbitrary physical address space into the kernel virtual
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* address space. Needed when the kernel wants to access high addresses
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* directly.
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*
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* NOTE! We need to allow non-page-aligned mappings too: we will obviously
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* have to convert them into an offset in a page-aligned mapping, but the
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* caller shouldn't need to know that small detail.
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*/
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void __iomem *
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__arm_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
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unsigned int mtype)
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{
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return __arm_ioremap_pfn_caller(pfn, offset, size, mtype,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(__arm_ioremap_pfn);
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void __iomem * (*arch_ioremap_caller)(phys_addr_t, size_t,
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unsigned int, void *) =
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__arm_ioremap_caller;
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void __iomem *ioremap(resource_size_t res_cookie, size_t size)
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{
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return arch_ioremap_caller(res_cookie, size, MT_DEVICE,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap);
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void __iomem *ioremap_cache(resource_size_t res_cookie, size_t size)
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__alias(ioremap_cached);
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void __iomem *ioremap_cached(resource_size_t res_cookie, size_t size)
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{
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return arch_ioremap_caller(res_cookie, size, MT_DEVICE_CACHED,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap_cache);
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EXPORT_SYMBOL(ioremap_cached);
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void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size)
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{
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return arch_ioremap_caller(res_cookie, size, MT_DEVICE_WC,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap_wc);
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/*
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* Remap an arbitrary physical address space into the kernel virtual
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* address space as memory. Needed when the kernel wants to execute
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* code in external memory. This is needed for reprogramming source
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* clocks that would affect normal memory for example. Please see
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* CONFIG_GENERIC_ALLOCATOR for allocating external memory.
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*/
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void __iomem *
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__arm_ioremap_exec(phys_addr_t phys_addr, size_t size, bool cached)
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{
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unsigned int mtype;
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if (cached)
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mtype = MT_MEMORY_RWX;
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else
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mtype = MT_MEMORY_RWX_NONCACHED;
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return __arm_ioremap_caller(phys_addr, size, mtype,
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__builtin_return_address(0));
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}
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void *arch_memremap_wb(phys_addr_t phys_addr, size_t size)
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{
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return (__force void *)arch_ioremap_caller(phys_addr, size,
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MT_MEMORY_RW,
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__builtin_return_address(0));
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}
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void __iounmap(volatile void __iomem *io_addr)
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{
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void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
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struct static_vm *svm;
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/* If this is a static mapping, we must leave it alone */
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svm = find_static_vm_vaddr(addr);
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if (svm)
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return;
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#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
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{
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struct vm_struct *vm;
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vm = find_vm_area(addr);
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/*
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* If this is a section based mapping we need to handle it
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* specially as the VM subsystem does not know how to handle
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* such a beast.
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*/
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if (vm && (vm->flags & VM_ARM_SECTION_MAPPING))
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unmap_area_sections((unsigned long)vm->addr, vm->size);
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}
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#endif
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vunmap(addr);
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}
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void (*arch_iounmap)(volatile void __iomem *) = __iounmap;
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void iounmap(volatile void __iomem *cookie)
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{
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arch_iounmap(cookie);
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}
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EXPORT_SYMBOL(iounmap);
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#ifdef CONFIG_PCI
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static int pci_ioremap_mem_type = MT_DEVICE;
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void pci_ioremap_set_mem_type(int mem_type)
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{
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pci_ioremap_mem_type = mem_type;
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}
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int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr)
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{
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BUG_ON(offset + SZ_64K > IO_SPACE_LIMIT);
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return ioremap_page_range(PCI_IO_VIRT_BASE + offset,
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PCI_IO_VIRT_BASE + offset + SZ_64K,
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phys_addr,
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__pgprot(get_mem_type(pci_ioremap_mem_type)->prot_pte));
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}
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EXPORT_SYMBOL_GPL(pci_ioremap_io);
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void __iomem *pci_remap_cfgspace(resource_size_t res_cookie, size_t size)
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{
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return arch_ioremap_caller(res_cookie, size, MT_UNCACHED,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL_GPL(pci_remap_cfgspace);
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#endif
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/*
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* Must be called after early_fixmap_init
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*/
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void __init early_ioremap_init(void)
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{
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early_ioremap_setup();
|
|
}
|