forked from Minki/linux
1f23a56a46
Mali-DP650 supports warming up the SMMU translations, by sending requsts to the SMMU before a buffer is read. There are two modes supported: - PARTIAL: could be enabled when the buffer is composed of 4K or 64K pages, the display hardware will send a configurable number of requests before the actual reading. - FULL: could be enabled when the buffer is composed of 1M or 2M pages, the display hardware will send requests before reading for all pages composing the buffer. This patch adds a mechanism for detecting the page size and set the MMU prefetch mode if possible. Changes since v1: - For imported buffers use the already populated drm_gem_cma_object.sgt instead of calling driver.gem_prime_get_sg_table, which works just for buffers allocated through the gem_cma API. Signed-off-by: Jamie Fox <jamie.fox@arm.com> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> [rebased and re-ordered functions] Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
103 lines
2.7 KiB
C
103 lines
2.7 KiB
C
/*
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* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
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* Author: Liviu Dudau <Liviu.Dudau@arm.com>
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU licence.
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*
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* ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
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*/
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#ifndef __MALIDP_DRV_H__
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#define __MALIDP_DRV_H__
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#include <drm/drm_writeback.h>
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#include <drm/drm_encoder.h>
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#include <linux/mutex.h>
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#include <linux/wait.h>
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#include <linux/spinlock.h>
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#include <drm/drmP.h>
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#include "malidp_hw.h"
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#define MALIDP_CONFIG_VALID_INIT 0
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#define MALIDP_CONFIG_VALID_DONE 1
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#define MALIDP_CONFIG_START 0xd0
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struct malidp_error_stats {
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s32 num_errors;
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u32 last_error_status;
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s64 last_error_vblank;
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};
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struct malidp_drm {
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struct malidp_hw_device *dev;
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struct drm_crtc crtc;
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struct drm_writeback_connector mw_connector;
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wait_queue_head_t wq;
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struct drm_pending_vblank_event *event;
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atomic_t config_valid;
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u32 core_id;
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#ifdef CONFIG_DEBUG_FS
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struct malidp_error_stats de_errors;
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struct malidp_error_stats se_errors;
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/* Protects errors stats */
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spinlock_t errors_lock;
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#endif
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};
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#define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
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struct malidp_plane {
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struct drm_plane base;
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struct malidp_hw_device *hwdev;
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const struct malidp_layer *layer;
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};
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enum mmu_prefetch_mode {
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MALIDP_PREFETCH_MODE_NONE,
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MALIDP_PREFETCH_MODE_PARTIAL,
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MALIDP_PREFETCH_MODE_FULL,
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};
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struct malidp_plane_state {
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struct drm_plane_state base;
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/* size of the required rotation memory if plane is rotated */
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u32 rotmem_size;
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/* internal format ID */
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u8 format;
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u8 n_planes;
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enum mmu_prefetch_mode mmu_prefetch_mode;
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u32 mmu_prefetch_pgsize;
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};
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#define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
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#define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
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struct malidp_crtc_state {
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struct drm_crtc_state base;
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u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
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u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
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struct malidp_se_config scaler_config;
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/* Bitfield of all the planes that have requested a scaled output. */
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u8 scaled_planes_mask;
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};
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#define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
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int malidp_de_planes_init(struct drm_device *drm);
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int malidp_crtc_init(struct drm_device *drm);
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#ifdef CONFIG_DEBUG_FS
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void malidp_error(struct malidp_drm *malidp,
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struct malidp_error_stats *error_stats, u32 status,
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u64 vblank);
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#endif
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/* often used combination of rotational bits */
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#define MALIDP_ROTATED_MASK (DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
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#endif /* __MALIDP_DRV_H__ */
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