forked from Minki/linux
a54081c45c
Signed-off-by: Harald Krapfenbauer <harald.krapfenbauer@bluetechnix.at> Signed-off-by: Bob Liu <lliubbo@gmail.com>
946 lines
21 KiB
C
946 lines
21 KiB
C
/*
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* Copyright 2004-2009 Analog Devices Inc.
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* 2008-2009 Bluetechnix
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* 2005 National ICT Australia (NICTA)
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* Aidan Williams <aidan@nicta.com.au>
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/device.h>
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#include <linux/export.h>
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#include <linux/etherdevice.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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#include <linux/usb/isp1362.h>
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#endif
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#include <linux/ata_platform.h>
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#include <linux/irq.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/portmux.h>
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#include <asm/dpmc.h>
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#include <asm/bfin_sport.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "Bluetechnix CM BF537E";
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#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
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/* all SPI peripherals info goes here */
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#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
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static struct mtd_partition bfin_spi_flash_partitions[] = {
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{
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.name = "bootloader(spi)",
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.size = 0x00020000,
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.offset = 0,
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.mask_flags = MTD_CAP_ROM
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}, {
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.name = "linux kernel(spi)",
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.size = 0xe0000,
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.offset = 0x20000
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}, {
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.name = "file system(spi)",
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.size = 0x700000,
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.offset = 0x00100000,
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}
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};
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static struct flash_platform_data bfin_spi_flash_data = {
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.name = "m25p80",
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.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p64",
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};
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/* SPI flash chip (m25p64) */
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
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.enable_dma = 0, /* use dma transfer with this chip*/
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};
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#endif
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#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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static struct bfin5xx_spi_chip mmc_spi_chip_info = {
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.enable_dma = 0,
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};
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#endif
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static struct spi_board_info bfin_spi_board_info[] __initdata = {
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#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
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{
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/* the modalias must be the same as spi device driver name */
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.modalias = "m25p80", /* Name of spi_driver for this device */
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.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
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.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
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.platform_data = &bfin_spi_flash_data,
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.controller_data = &spi_flash_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
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{
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.modalias = "ad183x",
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.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 4,
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},
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#endif
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#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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{
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.modalias = "mmc_spi",
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.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 1,
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.controller_data = &mmc_spi_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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};
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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[0] = {
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.start = SPI0_REGBASE,
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.end = SPI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = CH_SPI,
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.end = CH_SPI,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = IRQ_SPI,
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.end = IRQ_SPI,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* SPI controller data */
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static struct bfin5xx_spi_master bfin_spi0_info = {
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.num_chipselect = 8,
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.enable_dma = 1, /* master has the ability to do dma transfer */
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.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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};
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static struct platform_device bfin_spi0_device = {
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.name = "bfin-spi",
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.id = 0, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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.resource = bfin_spi0_resource,
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.dev = {
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.platform_data = &bfin_spi0_info, /* Passed to driver */
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},
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};
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#endif /* spi master and devices */
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#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
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/* SPORT SPI controller data */
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static struct bfin5xx_spi_master bfin_sport_spi0_info = {
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.num_chipselect = MAX_BLACKFIN_GPIOS,
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.enable_dma = 0, /* master don't support DMA */
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.pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
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P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
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};
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static struct resource bfin_sport_spi0_resource[] = {
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[0] = {
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.start = SPORT0_TCR1,
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.end = SPORT0_TCR1 + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_SPORT0_ERROR,
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.end = IRQ_SPORT0_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_sport_spi0_device = {
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.name = "bfin-sport-spi",
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.id = 1, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
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.resource = bfin_sport_spi0_resource,
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.dev = {
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.platform_data = &bfin_sport_spi0_info, /* Passed to driver */
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},
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};
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static struct bfin5xx_spi_master bfin_sport_spi1_info = {
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.num_chipselect = MAX_BLACKFIN_GPIOS,
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.enable_dma = 0, /* master don't support DMA */
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.pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
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P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
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};
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static struct resource bfin_sport_spi1_resource[] = {
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[0] = {
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.start = SPORT1_TCR1,
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.end = SPORT1_TCR1 + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_SPORT1_ERROR,
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.end = IRQ_SPORT1_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_sport_spi1_device = {
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.name = "bfin-sport-spi",
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.id = 2, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
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.resource = bfin_sport_spi1_resource,
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.dev = {
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.platform_data = &bfin_sport_spi1_info, /* Passed to driver */
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},
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};
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#endif /* sport spi master and devices */
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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static struct platform_device rtc_device = {
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.name = "rtc-bfin",
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.id = -1,
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};
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#endif
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#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
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static struct platform_device hitachi_fb_device = {
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.name = "hitachi-tx09",
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};
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#endif
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#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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#include <linux/smc91x.h>
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static struct smc91x_platdata smc91x_info = {
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.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
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.leda = RPC_LED_100_10,
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.ledb = RPC_LED_TX_RX,
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};
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static struct resource smc91x_resources[] = {
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{
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.start = 0x20200300,
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.end = 0x20200300 + 16,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF14,
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.end = IRQ_PF14,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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.dev = {
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.platform_data = &smc91x_info,
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},
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};
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#endif
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#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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static struct resource isp1362_hcd_resources[] = {
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{
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.start = 0x20308000,
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.end = 0x20308000,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 0x20308004,
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.end = 0x20308004,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PG15,
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.end = IRQ_PG15,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
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},
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};
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static struct isp1362_platform_data isp1362_priv = {
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.sel15Kres = 1,
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.clknotstop = 0,
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.oc_enable = 0,
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.int_act_high = 0,
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.int_edge_triggered = 0,
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.remote_wakeup_connected = 0,
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.no_power_switching = 1,
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.power_switching_mode = 0,
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};
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static struct platform_device isp1362_hcd_device = {
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.name = "isp1362-hcd",
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.id = 0,
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.dev = {
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.platform_data = &isp1362_priv,
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},
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.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
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.resource = isp1362_hcd_resources,
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};
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#endif
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#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
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static struct resource net2272_bfin_resources[] = {
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{
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.start = 0x20300000,
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.end = 0x20300000 + 0x100,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PG13,
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.end = IRQ_PG13,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device net2272_bfin_device = {
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.name = "net2272",
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.id = -1,
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.num_resources = ARRAY_SIZE(net2272_bfin_resources),
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.resource = net2272_bfin_resources,
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};
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#endif
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#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
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static struct mtd_partition cm_partitions[] = {
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{
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.name = "bootloader(nor)",
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.size = 0x40000,
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.offset = 0,
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}, {
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.name = "linux kernel(nor)",
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.size = 0x100000,
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.offset = MTDPART_OFS_APPEND,
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}, {
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.name = "file system(nor)",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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static struct physmap_flash_data cm_flash_data = {
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.width = 2,
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.parts = cm_partitions,
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.nr_parts = ARRAY_SIZE(cm_partitions),
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};
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static unsigned cm_flash_gpios[] = { GPIO_PF4 };
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static struct resource cm_flash_resource[] = {
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{
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.name = "cfi_probe",
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.start = 0x20000000,
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.end = 0x201fffff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = (unsigned long)cm_flash_gpios,
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.end = ARRAY_SIZE(cm_flash_gpios),
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device cm_flash_device = {
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.name = "gpio-addr-flash",
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.id = 0,
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.dev = {
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.platform_data = &cm_flash_data,
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},
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.num_resources = ARRAY_SIZE(cm_flash_resource),
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.resource = cm_flash_resource,
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};
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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#ifdef CONFIG_SERIAL_BFIN_UART0
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static struct resource bfin_uart0_resources[] = {
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{
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.start = UART0_THR,
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.end = UART0_GCTL+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART0_TX,
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.end = IRQ_UART0_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART0_RX,
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.end = IRQ_UART0_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART0_ERROR,
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.end = IRQ_UART0_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART0_TX,
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.end = CH_UART0_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART0_RX,
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.end = CH_UART0_RX,
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.flags = IORESOURCE_DMA,
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},
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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{
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/*
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* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
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*/
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.start = -1,
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.end = -1,
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.flags = IORESOURCE_IO,
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},
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{
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/*
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* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
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*/
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.start = -1,
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.end = -1,
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.flags = IORESOURCE_IO,
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},
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#endif
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};
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static unsigned short bfin_uart0_peripherals[] = {
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P_UART0_TX, P_UART0_RX, 0
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};
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static struct platform_device bfin_uart0_device = {
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.name = "bfin-uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_uart0_resources),
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.resource = bfin_uart0_resources,
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.dev = {
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.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
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},
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};
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#endif
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#ifdef CONFIG_SERIAL_BFIN_UART1
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static struct resource bfin_uart1_resources[] = {
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{
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.start = UART1_THR,
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.end = UART1_GCTL+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART1_TX,
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.end = IRQ_UART1_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART1_RX,
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.end = IRQ_UART1_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART1_ERROR,
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.end = IRQ_UART1_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART1_TX,
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.end = CH_UART1_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART1_RX,
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.end = CH_UART1_RX,
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.flags = IORESOURCE_DMA,
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},
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#ifdef CONFIG_BFIN_UART1_CTSRTS
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{
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/*
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* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
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*/
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.start = -1,
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.end = -1,
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.flags = IORESOURCE_IO,
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},
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{
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/*
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* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
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*/
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.start = -1,
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.end = -1,
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.flags = IORESOURCE_IO,
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},
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#endif
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};
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static unsigned short bfin_uart1_peripherals[] = {
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P_UART1_TX, P_UART1_RX, 0
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};
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static struct platform_device bfin_uart1_device = {
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.name = "bfin-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_uart1_resources),
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.resource = bfin_uart1_resources,
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.dev = {
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.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
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},
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};
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
|
#ifdef CONFIG_BFIN_SIR0
|
|
static struct resource bfin_sir0_resources[] = {
|
|
{
|
|
.start = 0xFFC00400,
|
|
.end = 0xFFC004FF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_UART0_RX,
|
|
.end = IRQ_UART0_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = CH_UART0_RX,
|
|
.end = CH_UART0_RX+1,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
static struct platform_device bfin_sir0_device = {
|
|
.name = "bfin_sir",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_sir0_resources),
|
|
.resource = bfin_sir0_resources,
|
|
};
|
|
#endif
|
|
#ifdef CONFIG_BFIN_SIR1
|
|
static struct resource bfin_sir1_resources[] = {
|
|
{
|
|
.start = 0xFFC02000,
|
|
.end = 0xFFC020FF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_UART1_RX,
|
|
.end = IRQ_UART1_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = CH_UART1_RX,
|
|
.end = CH_UART1_RX+1,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
static struct platform_device bfin_sir1_device = {
|
|
.name = "bfin_sir",
|
|
.id = 1,
|
|
.num_resources = ARRAY_SIZE(bfin_sir1_resources),
|
|
.resource = bfin_sir1_resources,
|
|
};
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
|
static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
|
|
|
|
static struct resource bfin_twi0_resource[] = {
|
|
[0] = {
|
|
.start = TWI0_REGBASE,
|
|
.end = TWI0_REGBASE,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_TWI,
|
|
.end = IRQ_TWI,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device i2c_bfin_twi_device = {
|
|
.name = "i2c-bfin-twi",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
|
|
.resource = bfin_twi0_resource,
|
|
.dev = {
|
|
.platform_data = &bfin_twi0_pins,
|
|
},
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \
|
|
|| defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
|
|
unsigned short bfin_sport0_peripherals[] = {
|
|
P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
|
|
P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
|
|
};
|
|
#endif
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
static struct resource bfin_sport0_uart_resources[] = {
|
|
{
|
|
.start = SPORT0_TCR1,
|
|
.end = SPORT0_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_RX,
|
|
.end = IRQ_SPORT0_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_ERROR,
|
|
.end = IRQ_SPORT0_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device bfin_sport0_uart_device = {
|
|
.name = "bfin-sport-uart",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
|
|
.resource = bfin_sport0_uart_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
static struct resource bfin_sport1_uart_resources[] = {
|
|
{
|
|
.start = SPORT1_TCR1,
|
|
.end = SPORT1_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT1_RX,
|
|
.end = IRQ_SPORT1_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT1_ERROR,
|
|
.end = IRQ_SPORT1_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static unsigned short bfin_sport1_peripherals[] = {
|
|
P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
|
|
P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
|
|
};
|
|
|
|
static struct platform_device bfin_sport1_uart_device = {
|
|
.name = "bfin-sport-uart",
|
|
.id = 1,
|
|
.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
|
|
.resource = bfin_sport1_uart_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#endif
|
|
#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
|
|
static struct resource bfin_sport0_resources[] = {
|
|
{
|
|
.start = SPORT0_TCR1,
|
|
.end = SPORT0_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_RX,
|
|
.end = IRQ_SPORT0_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_TX,
|
|
.end = IRQ_SPORT0_TX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_ERROR,
|
|
.end = IRQ_SPORT0_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = CH_SPORT0_TX,
|
|
.end = CH_SPORT0_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.start = CH_SPORT0_RX,
|
|
.end = CH_SPORT0_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
static struct platform_device bfin_sport0_device = {
|
|
.name = "bfin_sport_raw",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_sport0_resources),
|
|
.resource = bfin_sport0_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
|
#include <linux/bfin_mac.h>
|
|
static const unsigned short bfin_mac_peripherals[] = P_MII0;
|
|
|
|
static struct bfin_phydev_platform_data bfin_phydev_data[] = {
|
|
{
|
|
.addr = 1,
|
|
.irq = IRQ_MAC_PHYINT,
|
|
},
|
|
};
|
|
|
|
static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
|
|
.phydev_number = 1,
|
|
.phydev_data = bfin_phydev_data,
|
|
.phy_mode = PHY_INTERFACE_MODE_MII,
|
|
.mac_peripherals = bfin_mac_peripherals,
|
|
};
|
|
|
|
static struct platform_device bfin_mii_bus = {
|
|
.name = "bfin_mii_bus",
|
|
.dev = {
|
|
.platform_data = &bfin_mii_bus_data,
|
|
}
|
|
};
|
|
|
|
static struct platform_device bfin_mac_device = {
|
|
.name = "bfin_mac",
|
|
.dev = {
|
|
.platform_data = &bfin_mii_bus,
|
|
}
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
|
|
#define PATA_INT IRQ_PF14
|
|
|
|
static struct pata_platform_info bfin_pata_platform_data = {
|
|
.ioport_shift = 2,
|
|
.irq_type = IRQF_TRIGGER_HIGH,
|
|
};
|
|
|
|
static struct resource bfin_pata_resources[] = {
|
|
{
|
|
.start = 0x2030C000,
|
|
.end = 0x2030C01F,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = 0x2030D018,
|
|
.end = 0x2030D01B,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = PATA_INT,
|
|
.end = PATA_INT,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device bfin_pata_device = {
|
|
.name = "pata_platform",
|
|
.id = -1,
|
|
.num_resources = ARRAY_SIZE(bfin_pata_resources),
|
|
.resource = bfin_pata_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_pata_platform_data,
|
|
}
|
|
};
|
|
#endif
|
|
|
|
static const unsigned int cclk_vlev_datasheet[] =
|
|
{
|
|
VRPAIR(VLEV_085, 250000000),
|
|
VRPAIR(VLEV_090, 376000000),
|
|
VRPAIR(VLEV_095, 426000000),
|
|
VRPAIR(VLEV_100, 426000000),
|
|
VRPAIR(VLEV_105, 476000000),
|
|
VRPAIR(VLEV_110, 476000000),
|
|
VRPAIR(VLEV_115, 476000000),
|
|
VRPAIR(VLEV_120, 500000000),
|
|
VRPAIR(VLEV_125, 533000000),
|
|
VRPAIR(VLEV_130, 600000000),
|
|
};
|
|
|
|
static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
|
|
.tuple_tab = cclk_vlev_datasheet,
|
|
.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
|
|
.vr_settling_time = 25 /* us */,
|
|
};
|
|
|
|
static struct platform_device bfin_dpmc = {
|
|
.name = "bfin dpmc",
|
|
.dev = {
|
|
.platform_data = &bfin_dmpc_vreg_data,
|
|
},
|
|
};
|
|
|
|
static struct platform_device *cm_bf537e_devices[] __initdata = {
|
|
|
|
&bfin_dpmc,
|
|
|
|
#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
|
|
&bfin_sport0_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
|
|
&hitachi_fb_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
|
&rtc_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
&bfin_uart0_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
|
&bfin_uart1_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
|
#ifdef CONFIG_BFIN_SIR0
|
|
&bfin_sir0_device,
|
|
#endif
|
|
#ifdef CONFIG_BFIN_SIR1
|
|
&bfin_sir1_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
|
&i2c_bfin_twi_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
&bfin_sport0_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
&bfin_sport1_uart_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
|
|
&isp1362_hcd_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
|
|
&smc91x_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
|
&bfin_mii_bus,
|
|
&bfin_mac_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
|
|
&net2272_bfin_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
|
|
&bfin_spi0_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
|
|
&bfin_sport_spi0_device,
|
|
&bfin_sport_spi1_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
|
|
&bfin_pata_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
|
|
&cm_flash_device,
|
|
#endif
|
|
};
|
|
|
|
static int __init net2272_init(void)
|
|
{
|
|
#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
|
|
int ret;
|
|
|
|
ret = gpio_request(GPIO_PG14, "net2272");
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Reset USB Chip, PG14 */
|
|
gpio_direction_output(GPIO_PG14, 0);
|
|
mdelay(2);
|
|
gpio_set_value(GPIO_PG14, 1);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __init cm_bf537e_init(void)
|
|
{
|
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
|
platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
|
|
#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
|
|
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
|
#endif
|
|
|
|
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
|
|
irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
|
|
#endif
|
|
|
|
if (net2272_init())
|
|
pr_warning("unable to configure net2272; it probably won't work\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(cm_bf537e_init);
|
|
|
|
static struct platform_device *cm_bf537e_early_devices[] __initdata = {
|
|
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
&bfin_uart0_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
|
&bfin_uart1_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
&bfin_sport0_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
&bfin_sport1_uart_device,
|
|
#endif
|
|
#endif
|
|
};
|
|
|
|
void __init native_machine_early_platform_add_devices(void)
|
|
{
|
|
printk(KERN_INFO "register early platform devices\n");
|
|
early_platform_add_devices(cm_bf537e_early_devices,
|
|
ARRAY_SIZE(cm_bf537e_early_devices));
|
|
}
|
|
|
|
int bfin_get_ether_addr(char *addr)
|
|
{
|
|
return 1;
|
|
}
|
|
EXPORT_SYMBOL(bfin_get_ether_addr);
|