226b9391d1
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
280 lines
6.4 KiB
Plaintext
280 lines
6.4 KiB
Plaintext
/*
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* B4420DS Device Tree Source
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*
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* Copyright 2012 - 2015 Freescale Semiconductor, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* This software is provided by Freescale Semiconductor "as is" and any
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* express or implied warranties, including, but not limited to, the implied
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* warranties of merchantability and fitness for a particular purpose are
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* disclaimed. In no event shall Freescale Semiconductor be liable for any
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* direct, indirect, incidental, special, exemplary, or consequential damages
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* (including, but not limited to, procurement of substitute goods or services;
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* loss of use, data, or profits; or business interruption) however caused and
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* on any theory of liability, whether in contract, strict liability, or tort
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* (including negligence or otherwise) arising in any way out of the use of
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* this software, even if advised of the possibility of such damage.
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*/
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/ {
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model = "fsl,B4QDS";
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compatible = "fsl,B4QDS";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&mpic>;
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aliases {
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phy_sgmii_10 = &phy_sgmii_10;
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phy_sgmii_11 = &phy_sgmii_11;
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phy_sgmii_1c = &phy_sgmii_1c;
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phy_sgmii_1d = &phy_sgmii_1d;
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};
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ifc: localbus@ffe124000 {
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reg = <0xf 0xfe124000 0 0x2000>;
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ranges = <0 0 0xf 0xe8000000 0x08000000
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2 0 0xf 0xff800000 0x00010000
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3 0 0xf 0xffdf0000 0x00008000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x8000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@2,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,ifc-nand";
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reg = <0x2 0x0 0x10000>;
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partition@0 {
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/* This location must not be altered */
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/* 1MB for u-boot Bootloader Image */
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reg = <0x0 0x00100000>;
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label = "NAND U-Boot Image";
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read-only;
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};
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partition@100000 {
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/* 1MB for DTB Image */
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reg = <0x00100000 0x00100000>;
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label = "NAND DTB Image";
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};
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partition@200000 {
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/* 10MB for Linux Kernel Image */
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reg = <0x00200000 0x00A00000>;
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label = "NAND Linux Kernel Image";
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};
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partition@c00000 {
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/* 500MB for Root file System Image */
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reg = <0x00c00000 0x1F400000>;
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label = "NAND RFS Image";
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};
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};
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board-control@3,0 {
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compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis";
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reg = <3 0 0x300>;
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};
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};
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memory {
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device_type = "memory";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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bman_fbpr: bman-fbpr {
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size = <0 0x1000000>;
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alignment = <0 0x1000000>;
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};
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qman_fqd: qman-fqd {
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size = <0 0x400000>;
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alignment = <0 0x400000>;
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};
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qman_pfdr: qman-pfdr {
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size = <0 0x2000000>;
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alignment = <0 0x2000000>;
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};
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};
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dcsr: dcsr@f00000000 {
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ranges = <0x00000000 0xf 0x00000000 0x01052000>;
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};
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bportals: bman-portals@ff4000000 {
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ranges = <0x0 0xf 0xf4000000 0x2000000>;
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};
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qportals: qman-portals@ff6000000 {
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ranges = <0x0 0xf 0xf6000000 0x2000000>;
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};
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soc: soc@ffe000000 {
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ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
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reg = <0xf 0xfe000000 0 0x00001000>;
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spi@110000 {
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "sst,sst25wf040", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>; /* input clock */
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};
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};
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sdhc@114000 {
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/*Disabled as there is no sdhc connector on B4420QDS board*/
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status = "disabled";
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};
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i2c@118000 {
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mux@77 {
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compatible = "nxp,pca9547";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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eeprom@50 {
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compatible = "atmel,24c64";
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reg = <0x50>;
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};
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eeprom@51 {
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compatible = "atmel,24c256";
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reg = <0x51>;
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};
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eeprom@53 {
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compatible = "atmel,24c256";
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reg = <0x53>;
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};
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eeprom@57 {
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compatible = "atmel,24c256";
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reg = <0x57>;
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};
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rtc@68 {
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compatible = "dallas,ds3232";
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reg = <0x68>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2>;
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ina220@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <1000>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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adt7461@4c {
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compatible = "adi,adt7461";
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reg = <0x4c>;
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};
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};
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};
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};
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usb@210000 {
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dr_mode = "host";
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phy_type = "ulpi";
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};
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fman@400000 {
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ethernet@e0000 {
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phy-handle = <&phy_sgmii_10>;
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phy-connection-type = "sgmii";
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};
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ethernet@e2000 {
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phy-handle = <&phy_sgmii_11>;
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phy-connection-type = "sgmii";
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};
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ethernet@e4000 {
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phy-handle = <&phy_sgmii_1c>;
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phy-connection-type = "sgmii";
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};
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ethernet@e6000 {
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phy-handle = <&phy_sgmii_1d>;
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phy-connection-type = "sgmii";
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};
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mdio@fc000 {
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phy_sgmii_10: ethernet-phy@10 {
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reg = <0x10>;
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};
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phy_sgmii_11: ethernet-phy@11 {
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reg = <0x11>;
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};
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phy_sgmii_1c: ethernet-phy@1c {
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reg = <0x1c>;
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status = "disabled";
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};
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phy_sgmii_1d: ethernet-phy@1d {
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reg = <0x1d>;
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status = "disabled";
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};
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};
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};
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};
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pci0: pcie@ffe200000 {
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reg = <0xf 0xfe200000 0 0x10000>;
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ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
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0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
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pcie@0 {
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ranges = <0x02000000 0 0xe0000000
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0x02000000 0 0xe0000000
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0 0x20000000
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0x01000000 0 0x00000000
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0x01000000 0 0x00000000
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0 0x00010000>;
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};
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};
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};
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/include/ "b4si-post.dtsi"
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