Huang, Xiong 024e1e4dcd atl1c: refine/update ASPM configuration ... some platforms(BIOS or OS) may change ASPM configuration in PCI Express Link Control Register directly and dynamically regardless the device driver installation. Checking if ASPM support during the driver init phase by reading PCI Express Link Contrl Register doesn't make sense. This refine/update assume L0S/L1 is defalut enabled as hw->ctrl_flags inited. atl1c_set_aspm will set real configuration based on chip capability to hardware register. atl1c_disable_l0s_l1 and register definition of REG_PM_CTRL are refined as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2012-04-19 20:14:20 -04:00
..
atl1c_ethtool.c	atl1c: remove VPD register	2012-04-18 15:35:30 -04:00
atl1c_hw.c	atheros eth: set addr_assign_type if random_ether_addr() used	2012-02-17 15:58:06 -05:00
atl1c_hw.h	atl1c: refine/update ASPM configuration	2012-04-19 20:14:20 -04:00
atl1c_main.c	atl1c: refine/update ASPM configuration	2012-04-19 20:14:20 -04:00
atl1c.h	atl1c: remove dmar_dly_cnt and dmaw_dly_cnt	2012-04-19 20:14:19 -04:00
Makefile