Daniel Vetter 01a6908c0c drm/i915: use correct power domain for csr loading ... Grabbing a runtime pm reference with intel_runtime_pm_get will only prevent device D3. But dmc firmware is required even earlier (namely for the skl power well 2). Hence we need to grab a rpm reference higher up in the hierarchy. For simplicity just grab the _INIT display power well. That's a bit too much, but since the firmware loading task should completely fairly quickly this won't be a real problem really. Cc: Damien Lespiau <damien.lespiau@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Sunil Kamath <sunil.kamath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Tested-by: Daniel Stone <daniels@collabora.com> # SKL Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-3-git-send-email-imre.deak@intel.com		2015-11-12 16:42:23 +02:00
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drm	drm/i915: use correct power domain for csr loading	2015-11-12 16:42:23 +02:00
host1x	gpu: host1x: mipi: Power down regulators when unused	2015-08-13 13:47:21 +02:00
ipu-v3	gpu/drm: Kill off set_irq_flags usage	2015-09-16 16:53:38 +02:00
vga	vga_switcheroo: Set active attribute to false for audio clients	2015-09-24 20:14:25 +02:00
Makefile