linux/drivers/phy
Tiezhu Yang 010f0dff9f phy: allwinner: Make PHY_SUN6I_MIPI_DPHY depend on COMMON_CLK
When CONFIG_ARCH_SUNXI is not set but CONFIG_COMPILE_TEST=y,
CONFIG_HAVE_CLK=y, CONFIG_HAVE_LEGACY_CLK=y, there exists
the following build errors with CONFIG_PHY_SUN6I_MIPI_DPHY=y:

drivers/phy/allwinner/phy-sun6i-mipi-dphy.o: In function `sun6i_dphy_init':
phy-sun6i-mipi-dphy.c:(.text+0x320): undefined reference to `clk_set_rate_exclusive'
drivers/phy/allwinner/phy-sun6i-mipi-dphy.o: In function `sun6i_dphy_exit':
phy-sun6i-mipi-dphy.c:(.text+0x2c8): undefined reference to `clk_rate_exclusive_put'

clk_set_rate_exclusive() and clk_rate_exclusive_put() are defined
in drivers/clk/clk.c, this file is built under CONFIG_COMMON_CLK,
so in order to build drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
successful used with various configs, CONFIG_PHY_SUN6I_MIPI_DPHY
should depend on CONFIG_COMMON_CLK.

Fixes: 133552bf03 ("phy: Remove CONFIG_ARCH_* check for related subdir in Makefile")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Link: https://lore.kernel.org/r/1594113746-25393-1-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13 10:40:53 +05:30
..
allwinner phy: allwinner: Make PHY_SUN6I_MIPI_DPHY depend on COMMON_CLK 2020-07-13 10:40:53 +05:30
amlogic USB: changes for v5.8 merge window 2020-05-25 13:28:20 +02:00
broadcom drivers: phy: sr-usb: do not use internal fsm for USB2 phy init 2020-05-18 19:30:56 +05:30
cadence phy: cadence: salvo: fix wrong bit definition 2020-07-13 10:39:44 +05:30
freescale phy: for 5.3 2019-07-01 15:04:59 +02:00
hisilicon phy: hisilicon: Fix Kconfig indentation 2019-12-20 17:00:45 +05:30
intel phy: intel: Add driver support for ComboPhy 2020-05-19 20:26:06 +05:30
lantiq phy: lantiq: vrx200-pcie: Remove unneeded semicolon 2020-01-08 12:58:06 +05:30
marvell USB/Thunderbolt/PHY driver updates for 5.6-rc1 2020-01-29 10:09:44 -08:00
mediatek phy: phy-mtk-tphy: add a new reference clock 2020-03-20 19:34:29 +05:30
motorola phy: cpcap-usb: Remove some useless code 2020-05-13 08:27:35 +05:30
mscc treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
qualcomm phy: qcom: remove ufs qmp phy driver 2020-07-08 16:37:05 +05:30
ralink treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
renesas phy: renesas: phy-rcar-gen2: Fix the array off by one warning 2019-10-31 16:54:01 +05:30
rockchip phy: rk-inno-usb2: Decrease verbosity of repeating log. 2020-03-20 19:34:29 +05:30
samsung phy: exynos: Rename Exynos to lowercase 2020-06-24 22:44:19 +05:30
socionext phy: uniphier-pcie: Add SoC-dependent phy-mode function support 2020-03-20 19:34:29 +05:30
st treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
tegra phy: tegra: Select USB_COMMON for usb_get_maximum_speed() 2020-04-24 13:12:14 +05:30
ti phy: ti-pipe3: remove set but unused variable 2020-07-08 16:40:28 +05:30
xilinx phy: zynqmp: Fix unused-function compiler warning 2020-07-01 20:35:29 +05:30
Kconfig phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver 2020-06-29 18:48:00 +05:30
Makefile phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver 2020-06-29 18:48:00 +05:30
phy-core-mipi-dphy.c phy: dphy: Change units of wakeup and init parameters 2019-02-07 11:11:05 +05:30
phy-core.c phy: core: Document function args 2020-07-08 16:40:21 +05:30
phy-lpc18xx-usb-otg.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
phy-pistachio-usb.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422 2019-06-05 17:37:15 +02:00
phy-xgene.c phy: xgene: make array serdes_reg static const, makes object smaller 2019-10-23 13:20:26 +05:30