7546d2f48d
Loongson family machines has three types of serial port: PCI UART, LPC UART and CPU internal UART. Loongson-2E and parts of Loongson-2F based machines use PCI UART; most Loongson-2F based machines use LPC UART; Loongson-2G/3A has both LPC and CPU UART but usually use CPU UART. Port address of UARTs: CPU UART: REG_BASE + OFFSET; LPC UART: LIO1_BASE + OFFSET; PCI UART: PCIIO_BASE + OFFSET. Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART are called "CPU provided serial port". Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6635 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
53 lines
1.3 KiB
C
53 lines
1.3 KiB
C
/*
|
|
* Copyright (C) 2009 Lemote Inc.
|
|
* Author: Wu Zhangjin, wuzhangjin@gmail.com
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*/
|
|
|
|
#include <linux/module.h>
|
|
#include <asm/bootinfo.h>
|
|
|
|
#include <loongson.h>
|
|
|
|
/* ioremapped */
|
|
unsigned long _loongson_uart_base;
|
|
EXPORT_SYMBOL(_loongson_uart_base);
|
|
/* raw */
|
|
unsigned long loongson_uart_base;
|
|
EXPORT_SYMBOL(loongson_uart_base);
|
|
|
|
void prom_init_loongson_uart_base(void)
|
|
{
|
|
switch (mips_machtype) {
|
|
case MACH_LEMOTE_FL2E:
|
|
loongson_uart_base = LOONGSON_PCIIO_BASE + 0x3f8;
|
|
break;
|
|
case MACH_LEMOTE_FL2F:
|
|
case MACH_LEMOTE_LL2F:
|
|
loongson_uart_base = LOONGSON_PCIIO_BASE + 0x2f8;
|
|
break;
|
|
case MACH_LEMOTE_ML2F7:
|
|
case MACH_LEMOTE_YL2F89:
|
|
case MACH_DEXXON_GDIUM2F10:
|
|
case MACH_LEMOTE_NAS:
|
|
default:
|
|
/* The CPU provided serial port (LPC) */
|
|
loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8;
|
|
break;
|
|
case MACH_LEMOTE_A1004:
|
|
case MACH_LEMOTE_A1101:
|
|
case MACH_LEMOTE_A1201:
|
|
case MACH_LEMOTE_A1205:
|
|
/* The CPU provided serial port (CPU) */
|
|
loongson_uart_base = LOONGSON_REG_BASE + 0x1e0;
|
|
break;
|
|
}
|
|
|
|
_loongson_uart_base =
|
|
(unsigned long)ioremap_nocache(loongson_uart_base, 8);
|
|
}
|