00f7dc6363
Provide information through SOC_BUS to user space. Silicon revision is provided through devcfg device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
16 lines
380 B
Plaintext
16 lines
380 B
Plaintext
config ARCH_ZYNQ
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bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
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select ARM_AMBA
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select ARM_GIC
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select ARCH_HAS_CPUFREQ
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select ARCH_HAS_OPP
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select ICST
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select CADENCE_TTC_TIMER
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select ARM_GLOBAL_TIMER if !CPU_FREQ
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select MFD_SYSCON
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select SOC_BUS
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help
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Support for Xilinx Zynq ARM Cortex A9 Platform
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