linux/drivers/clk/meson
Neil Armstrong 0058502fb9 clk: meson-gxbb: Fix HDMI PLL for GXL SoCs
In an attempt to better describe the HDMI PLL, a single DCO clock was
left for GXBB and GXL, but the GXL DCO does not have a pre-multiplier.

This patch adds back a GXL specific HDMI PLL DCO with xtal as parent.

Fixes: 87173557d2 ("clk: meson: clk-pll: remove od parameters")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: http://lkml.kernel.org/r/1541516257-16157-3-git-send-email-narmstrong@baylibre.com
2018-11-23 15:11:56 +01:00
..
axg-aoclk.c clk: meson-axg: Add AO Clock and Reset controller driver 2018-05-15 14:19:43 +02:00
axg-aoclk.h clk: meson-axg: Add AO Clock and Reset controller driver 2018-05-15 14:19:43 +02:00
axg-audio.c clk: meson: axg: round audio system master clocks down 2018-09-26 12:02:00 +02:00
axg-audio.h clk: meson: axg: add the audio clock controller driver 2018-07-09 13:48:26 +02:00
axg.c clk: meson-axg: pcie: drop the mpll3 clock parent 2018-09-26 12:02:00 +02:00
axg.h clk: meson: clk-pll: remove od parameters 2018-09-26 12:01:57 +02:00
clk-mpll.c clk: meson: mpll: add round closest support 2018-05-21 11:31:29 +02:00
clk-phase.c clk: meson: add clk-phase clock driver 2018-07-09 13:47:22 +02:00
clk-pll.c clk: meson: clk-pll: drop hard-coded rates from pll tables 2018-09-26 12:02:00 +02:00
clk-regmap.c This time we have a good set of changes to the core framework that do some 2018-06-09 12:06:24 -07:00
clk-regmap.h clk: meson: use SPDX license identifiers consistently 2018-05-18 12:08:29 +02:00
clk-triphase.c clk: meson: add triple phase clock driver 2018-07-09 13:47:22 +02:00
clkc-audio.h clk: meson: add axg audio sclk divider driver 2018-07-09 13:48:25 +02:00
clkc.h clk: meson: Add vid_pll divider driver 2018-11-23 15:11:56 +01:00
gxbb-aoclk-32k.c clk: meson: use SPDX license identifiers consistently 2018-05-18 12:08:29 +02:00
gxbb-aoclk.c clk: meson: use SPDX license identifiers consistently 2018-05-18 12:08:29 +02:00
gxbb-aoclk.h This time we have a good set of changes to the core framework that do some 2018-06-09 12:06:24 -07:00
gxbb.c clk: meson-gxbb: Fix HDMI PLL for GXL SoCs 2018-11-23 15:11:56 +01:00
gxbb.h clk: meson: clk-pll: remove od parameters 2018-09-26 12:01:57 +02:00
Kconfig clk: meson: axg: add the audio clock controller driver 2018-07-09 13:48:26 +02:00
Makefile clk: meson: Add vid_pll divider driver 2018-11-23 15:11:56 +01:00
meson8b.c clk: meson: meson8b: use the regmap in the internal reset controller 2018-09-26 12:02:00 +02:00
meson8b.h clk: meson: clk-pll: remove od parameters 2018-09-26 12:01:57 +02:00
meson-aoclk.c clk: meson: aoclk: refactor common code into dedicated file 2018-05-15 14:19:42 +02:00
meson-aoclk.h clk: meson: aoclk: refactor common code into dedicated file 2018-05-15 14:19:42 +02:00
sclk-div.c clk: meson: add axg audio sclk divider driver 2018-07-09 13:48:25 +02:00
vid-pll-div.c clk: meson: Add vid_pll divider driver 2018-11-23 15:11:56 +01:00