Add basic devicetree support for SDX65 platform and MTP board from Qualcomm. The SDX65 platform features an ARM Cortex A7 CPU which forms the Application Processor Sub System (APSS) along with standard Qualcomm peripherals like GCC, TLMM, BLSP, QPIC, and BAM etc... Also, there exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem etc.. This commit adds basic devicetree support that includes GCC, RPMh clock, INTC and Debug UART. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1635552125-16407-3-git-send-email-quic_vamslank@quicinc.com
		
			
				
	
	
		
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			26 lines
		
	
	
		
			430 B
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: BSD-3-Clause
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| /*
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|  * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
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|  */
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| /dts-v1/;
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| 
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| #include "qcom-sdx65.dtsi"
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| 
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| / {
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| 	model = "Qualcomm Technologies, Inc. SDX65 MTP";
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| 	compatible = "qcom,sdx65-mtp", "qcom,sdx65";
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| 	qcom,board-id = <0x2010008 0x302>;
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| 
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| 	aliases {
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| 		serial0 = &blsp1_uart3;
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| 	};
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| 
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| 	chosen {
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| 		stdout-path = "serial0:115200n8";
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| 	};
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| };
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| 
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| &blsp1_uart3 {
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| 	status = "ok";
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| };
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