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0015cce5cf
linux/drivers/gpu/drm/amd/display/dc/dcn20
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David Galiffi 0015cce5cf drm/amd/display: Fix disabling dccg clocks 
[How & Why]
Updated procedure to match hardware programming guide.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25 18:00:35 -05:00
..
dcn20_dccg.c drm/amd/display: Add interface for ADD & DROP PIXEL Registers 2021-06-08 12:22:42 -04:00
dcn20_dccg.h drm/amd/display: Fix disabling dccg clocks 2022-01-25 18:00:35 -05:00
dcn20_dpp_cm.c drm/amd/display: Delete several unneeded bool conversions 2021-05-11 09:44:35 -04:00
dcn20_dpp.c drm/amd/display: fix function scopes 2021-12-13 16:34:26 -05:00
dcn20_dpp.h
dcn20_dsc.c drm/amd/display: fixed the DSC power off sequence during Driver PnP 2021-11-22 14:45:02 -05:00
dcn20_dsc.h
dcn20_dwb_scl.c drm/amd/display: fix function scopes 2021-12-13 16:34:26 -05:00
dcn20_dwb.c
dcn20_dwb.h
dcn20_hubbub.c drm/amd/display: log additional register state for debug 2021-07-21 13:39:25 -04:00
dcn20_hubbub.h drm/amd/display: log additional register state for debug 2021-07-21 13:39:25 -04:00
dcn20_hubp.c drm/amd/display: implement dc_mode_memclk 2021-12-14 16:08:41 -05:00
dcn20_hubp.h drm/amd/display: implement dc_mode_memclk 2021-12-14 16:08:41 -05:00
dcn20_hwseq.c drm/amd/display: access hpo dp link encoder only through link resource 2021-12-30 08:54:45 -05:00
dcn20_hwseq.h drm/amd/display: implement dc_mode_memclk 2021-12-14 16:08:41 -05:00
dcn20_init.c drm/amd: append missing includes 2021-12-13 16:32:34 -05:00
dcn20_init.h
dcn20_link_encoder.c drm/amdgpu/display: restore AUX_DPHY_TX_CONTROL for DCN2.x 2021-04-09 16:38:31 -04:00
dcn20_link_encoder.h
dcn20_mmhubbub.c
dcn20_mmhubbub.h
dcn20_mpc.c drm/amd/display: fix function scopes 2021-12-13 16:34:26 -05:00
dcn20_mpc.h
dcn20_opp.c
dcn20_opp.h
dcn20_optc.c drm/amd/display: fix function scopes 2021-12-13 16:34:26 -05:00
dcn20_optc.h drm/amd/display: fixed the DSC power off sequence during Driver PnP 2021-11-22 14:45:02 -05:00
dcn20_resource.c drm/amd/display: support new PMFW interface to disable Z9 only 2022-01-18 17:41:19 -05:00
dcn20_resource.h drm/amd/display: Move specific DCN2x code that uses FPU to DML 2021-08-05 21:17:59 -04:00
dcn20_stream_encoder.c drm/amd/display: Reset fifo after enable otg 2021-11-22 14:45:01 -05:00
dcn20_stream_encoder.h drm/amd/display: Add DPCD writes at key points 2021-09-14 15:57:09 -04:00
dcn20_vmid.c
dcn20_vmid.h
Makefile