forked from Minki/linux
71b597ef5d
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS hardware implements memory dynamic frequency scaling using this clock. Export this clock for SoCs which will be getting a devfreq driver. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
139 lines
4.2 KiB
C
139 lines
4.2 KiB
C
/*
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* Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
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#define _DT_BINDINGS_CLK_SUN50I_A64_H_
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#define CLK_PLL_VIDEO0 7
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#define CLK_PLL_PERIPH0 11
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#define CLK_CPUX 21
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#define CLK_BUS_MIPI_DSI 28
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#define CLK_BUS_CE 29
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#define CLK_BUS_DMA 30
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#define CLK_BUS_MMC0 31
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#define CLK_BUS_MMC1 32
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#define CLK_BUS_MMC2 33
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#define CLK_BUS_NAND 34
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#define CLK_BUS_DRAM 35
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#define CLK_BUS_EMAC 36
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#define CLK_BUS_TS 37
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#define CLK_BUS_HSTIMER 38
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#define CLK_BUS_SPI0 39
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#define CLK_BUS_SPI1 40
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#define CLK_BUS_OTG 41
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#define CLK_BUS_EHCI0 42
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#define CLK_BUS_EHCI1 43
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#define CLK_BUS_OHCI0 44
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#define CLK_BUS_OHCI1 45
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#define CLK_BUS_VE 46
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#define CLK_BUS_TCON0 47
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#define CLK_BUS_TCON1 48
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#define CLK_BUS_DEINTERLACE 49
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#define CLK_BUS_CSI 50
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#define CLK_BUS_HDMI 51
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#define CLK_BUS_DE 52
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#define CLK_BUS_GPU 53
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#define CLK_BUS_MSGBOX 54
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#define CLK_BUS_SPINLOCK 55
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#define CLK_BUS_CODEC 56
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#define CLK_BUS_SPDIF 57
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#define CLK_BUS_PIO 58
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#define CLK_BUS_THS 59
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#define CLK_BUS_I2S0 60
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#define CLK_BUS_I2S1 61
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#define CLK_BUS_I2S2 62
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#define CLK_BUS_I2C0 63
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#define CLK_BUS_I2C1 64
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#define CLK_BUS_I2C2 65
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#define CLK_BUS_SCR 66
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#define CLK_BUS_UART0 67
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#define CLK_BUS_UART1 68
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#define CLK_BUS_UART2 69
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#define CLK_BUS_UART3 70
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#define CLK_BUS_UART4 71
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#define CLK_BUS_DBG 72
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#define CLK_THS 73
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#define CLK_NAND 74
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#define CLK_MMC0 75
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#define CLK_MMC1 76
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#define CLK_MMC2 77
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#define CLK_TS 78
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#define CLK_CE 79
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#define CLK_SPI0 80
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#define CLK_SPI1 81
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#define CLK_I2S0 82
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#define CLK_I2S1 83
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#define CLK_I2S2 84
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#define CLK_SPDIF 85
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#define CLK_USB_PHY0 86
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#define CLK_USB_PHY1 87
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#define CLK_USB_HSIC 88
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#define CLK_USB_HSIC_12M 89
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#define CLK_USB_OHCI0 91
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#define CLK_USB_OHCI1 93
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#define CLK_DRAM 94
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#define CLK_DRAM_VE 95
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#define CLK_DRAM_CSI 96
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#define CLK_DRAM_DEINTERLACE 97
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#define CLK_DRAM_TS 98
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#define CLK_DE 99
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#define CLK_TCON0 100
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#define CLK_TCON1 101
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#define CLK_DEINTERLACE 102
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#define CLK_CSI_MISC 103
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#define CLK_CSI_SCLK 104
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#define CLK_CSI_MCLK 105
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#define CLK_VE 106
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#define CLK_AC_DIG 107
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#define CLK_AC_DIG_4X 108
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#define CLK_AVS 109
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#define CLK_HDMI 110
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#define CLK_HDMI_DDC 111
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#define CLK_MBUS 112
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#define CLK_DSI_DPHY 113
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#define CLK_GPU 114
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#endif /* _DT_BINDINGS_CLK_SUN50I_H_ */
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