a3c8f906ed
Intel Platform Monitoring Technology (PMT) support is indicated by presence of an Intel defined PCIe Designated Vendor Specific Extended Capabilities (DVSEC) structure with a PMT specific ID. The current MFD implementation creates child devices for each PMT feature, currently telemetry, watcher, and crashlog. However DVSEC structures may also be used by Intel to indicate support for other features. The Out Of Band Management Services Module (OOBMSM) uses DVSEC to enumerate several features, including PMT. In order to support them it is necessary to modify the intel_pmt driver to handle the creation of the child devices more generically. To that end, modify the driver to create child devices for any VSEC/DVSEC features on supported devices (indicated by PCI ID). Additionally, move the implementation from MFD to the Auxiliary bus. VSEC/DVSEC features are really multifunctional PCI devices, not platform devices as MFD was designed for. Auxiliary bus gives more flexibility by allowing the definition of custom structures that can be shared between associated auxiliary devices and the parent device. Also, rename the driver from intel_pmt to intel_vsec to better reflect the purpose. This series also removes the current runtime pm support which was not complete to begin with. None of the current devices require runtime pm. However the support will be replaced when a device is added that requires it. Reviewed-by: Mark Gross <markgross@kernel.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20211208015015.891275-4-david.e.box@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _INTEL_PMT_CLASS_H
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#define _INTEL_PMT_CLASS_H
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#include <linux/xarray.h>
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#include <linux/types.h>
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#include <linux/bits.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include "../vsec.h"
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/* PMT access types */
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#define ACCESS_BARID 2
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#define ACCESS_LOCAL 3
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/* PMT discovery base address/offset register layout */
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#define GET_BIR(v) ((v) & GENMASK(2, 0))
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#define GET_ADDRESS(v) ((v) & GENMASK(31, 3))
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struct intel_pmt_entry {
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struct bin_attribute pmt_bin_attr;
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struct kobject *kobj;
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void __iomem *disc_table;
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void __iomem *base;
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unsigned long base_addr;
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size_t size;
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u32 guid;
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int devid;
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};
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struct intel_pmt_header {
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u32 base_offset;
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u32 size;
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u32 guid;
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u8 access_type;
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};
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struct intel_pmt_namespace {
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const char *name;
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struct xarray *xa;
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const struct attribute_group *attr_grp;
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int (*pmt_header_decode)(struct intel_pmt_entry *entry,
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struct intel_pmt_header *header,
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struct device *dev);
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};
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bool intel_pmt_is_early_client_hw(struct device *dev);
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int intel_pmt_dev_create(struct intel_pmt_entry *entry,
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struct intel_pmt_namespace *ns,
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struct intel_vsec_device *dev, int idx);
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void intel_pmt_dev_destroy(struct intel_pmt_entry *entry,
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struct intel_pmt_namespace *ns);
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#endif
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