forked from Minki/linux
5c20a3a9df
riscv_cbom_block_size and riscv_init_cbom_blocksize() should always
be available and riscv_init_cbom_blocksize() should always be
invoked, even when compiling without RISCV_ISA_ZICBOM enabled. This
is because disabling RISCV_ISA_ZICBOM means "don't use zicbom
instructions in the kernel" not "pretend there isn't zicbom, even
when there is". When zicbom is available, whether the kernel enables
its use with RISCV_ISA_ZICBOM or not, KVM will offer it to guests.
Ensure we can build KVM and that the block size is initialized even
when compiling without RISCV_ISA_ZICBOM.
Fixes: 8f7e001e03 ("RISC-V: Clean up the Zicbom block size probing")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Anup Patel <anup@brainfault.org>
81 lines
2.0 KiB
C
81 lines
2.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* RISC-V specific functions to support DMA for non-coherent devices
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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*/
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#include <linux/dma-direct.h>
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#include <linux/dma-map-ops.h>
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#include <linux/mm.h>
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#include <asm/cacheflush.h>
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static bool noncoherent_supported;
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void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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void *vaddr = phys_to_virt(paddr);
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switch (dir) {
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case DMA_TO_DEVICE:
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ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
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break;
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case DMA_FROM_DEVICE:
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ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
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break;
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case DMA_BIDIRECTIONAL:
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ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
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break;
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default:
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break;
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}
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}
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void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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void *vaddr = phys_to_virt(paddr);
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switch (dir) {
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case DMA_TO_DEVICE:
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break;
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case DMA_FROM_DEVICE:
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case DMA_BIDIRECTIONAL:
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ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
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break;
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default:
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break;
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}
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}
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void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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void *flush_addr = page_address(page);
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ALT_CMO_OP(flush, flush_addr, size, riscv_cbom_block_size);
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}
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void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
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const struct iommu_ops *iommu, bool coherent)
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{
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WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN,
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TAINT_CPU_OUT_OF_SPEC,
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"%s %s: ARCH_DMA_MINALIGN smaller than riscv,cbom-block-size (%d < %d)",
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dev_driver_string(dev), dev_name(dev),
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ARCH_DMA_MINALIGN, riscv_cbom_block_size);
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WARN_TAINT(!coherent && !noncoherent_supported, TAINT_CPU_OUT_OF_SPEC,
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"%s %s: device non-coherent but no non-coherent operations supported",
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dev_driver_string(dev), dev_name(dev));
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dev->dma_coherent = coherent;
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}
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void riscv_noncoherent_supported(void)
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{
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WARN(!riscv_cbom_block_size,
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"Non-coherent DMA support enabled without a block size\n");
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noncoherent_supported = true;
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}
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