/* * arch/arm/mach-imx/mm-imx21.c * * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, * MA 02110-1301, USA. */ #include #include #include #include #include #include #include #include /* MX21 memory map definition */ static struct map_desc imx21_io_desc[] __initdata = { /* * this fixed mapping covers: * - AIPI1 * - AIPI2 * - AITC * - ROM Patch * - and some reserved space */ imx_map_entry(MX21, AIPI, MT_DEVICE), /* * this fixed mapping covers: * - CSI * - ATA */ imx_map_entry(MX21, SAHB1, MT_DEVICE), /* * this fixed mapping covers: * - EMI */ imx_map_entry(MX21, X_MEMC, MT_DEVICE), }; /* * Initialize the memory map. It is called during the * system startup to create static physical to virtual * memory map for the IO modules. */ void __init mx21_map_io(void) { iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc)); } void __init imx21_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX21); mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR)); imx_iomuxv1_init(MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR), MX21_NUM_GPIO_PORT); } void __init mx21_init_irq(void) { mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); } void __init imx21_soc_init(void) { mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); }