/* * Device Tree Source for Renesas r8a7778 * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Kuninori Morimoto * * based on r8a7779 * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Simon Horman * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ /include/ "skeleton.dtsi" / { compatible = "renesas,r8a7778"; cpus { cpu@0 { compatible = "arm,cortex-a9"; }; }; gic: interrupt-controller@fe438000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0xfe438000 0x1000>, <0xfe430000 0x100>; }; /* irqpin: IRQ0 - IRQ3 */ irqpin: irqpin@fe78001c { compatible = "renesas,intc-irqpin"; #interrupt-cells = <2>; interrupt-controller; status = "disabled"; /* default off */ reg = <0xfe78001c 4>, <0xfe780010 4>, <0xfe780024 4>, <0xfe780044 4>, <0xfe780064 4>; interrupt-parent = <&gic>; interrupts = <0 27 0x4 0 28 0x4 0 29 0x4 0 30 0x4>; sense-bitfield-width = <2>; }; gpio0: gpio@ffc40000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc40000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 0x4>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 32>; #interrupt-cells = <2>; interrupt-controller; }; gpio1: gpio@ffc41000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc41000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 0x4>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 32>; #interrupt-cells = <2>; interrupt-controller; }; gpio2: gpio@ffc42000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc42000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 0x4>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 32>; #interrupt-cells = <2>; interrupt-controller; }; gpio3: gpio@ffc43000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc43000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 0x4>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 32>; #interrupt-cells = <2>; interrupt-controller; }; gpio4: gpio@ffc44000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc44000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 0x4>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 27>; #interrupt-cells = <2>; interrupt-controller; }; pfc: pfc@fffc0000 { compatible = "renesas,pfc-r8a7778"; reg = <0xfffc0000 0x118>; }; i2c0: i2c@ffc70000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc70000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 67 0x4>; status = "disabled"; }; i2c1: i2c@ffc71000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc71000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 78 0x4>; status = "disabled"; }; i2c2: i2c@ffc72000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc72000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 76 0x4>; status = "disabled"; }; i2c3: i2c@ffc73000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc73000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 0x4>; status = "disabled"; }; mmcif: mmcif@ffe4e000 { compatible = "renesas,sh-mmcif"; reg = <0xffe4e000 0x100>; interrupt-parent = <&gic>; interrupts = <0 61 4>; status = "disabled"; }; };