// SPDX-License-Identifier: GPL-2.0 /* * Driver for FPGA Management Engine (FME) * * Copyright (C) 2017-2018 Intel Corporation, Inc. * * Authors: * Kang Luwei * Xiao Guangrong * Joseph Grecco * Enno Luebbers * Tim Whisonant * Ananda Ravuri * Henry Mitchel */ #include #include #include "dfl.h" static int fme_hdr_init(struct platform_device *pdev, struct dfl_feature *feature) { dev_dbg(&pdev->dev, "FME HDR Init.\n"); return 0; } static void fme_hdr_uinit(struct platform_device *pdev, struct dfl_feature *feature) { dev_dbg(&pdev->dev, "FME HDR UInit.\n"); } static const struct dfl_feature_ops fme_hdr_ops = { .init = fme_hdr_init, .uinit = fme_hdr_uinit, }; static struct dfl_feature_driver fme_feature_drvs[] = { { .id = FME_FEATURE_ID_HEADER, .ops = &fme_hdr_ops, }, { .ops = NULL, }, }; static int fme_open(struct inode *inode, struct file *filp) { struct platform_device *fdev = dfl_fpga_inode_to_feature_dev(inode); struct dfl_feature_platform_data *pdata = dev_get_platdata(&fdev->dev); int ret; if (WARN_ON(!pdata)) return -ENODEV; ret = dfl_feature_dev_use_begin(pdata); if (ret) return ret; dev_dbg(&fdev->dev, "Device File Open\n"); filp->private_data = pdata; return 0; } static int fme_release(struct inode *inode, struct file *filp) { struct dfl_feature_platform_data *pdata = filp->private_data; struct platform_device *pdev = pdata->dev; dev_dbg(&pdev->dev, "Device File Release\n"); dfl_feature_dev_use_end(pdata); return 0; } static long fme_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) { struct dfl_feature_platform_data *pdata = filp->private_data; struct platform_device *pdev = pdata->dev; struct dfl_feature *f; long ret; dev_dbg(&pdev->dev, "%s cmd 0x%x\n", __func__, cmd); switch (cmd) { default: /* * Let sub-feature's ioctl function to handle the cmd. * Sub-feature's ioctl returns -ENODEV when cmd is not * handled in this sub feature, and returns 0 or other * error code if cmd is handled. */ dfl_fpga_dev_for_each_feature(pdata, f) { if (f->ops && f->ops->ioctl) { ret = f->ops->ioctl(pdev, f, cmd, arg); if (ret != -ENODEV) return ret; } } } return -EINVAL; } static const struct file_operations fme_fops = { .owner = THIS_MODULE, .open = fme_open, .release = fme_release, .unlocked_ioctl = fme_ioctl, }; static int fme_probe(struct platform_device *pdev) { int ret; ret = dfl_fpga_dev_feature_init(pdev, fme_feature_drvs); if (ret) goto exit; ret = dfl_fpga_dev_ops_register(pdev, &fme_fops, THIS_MODULE); if (ret) goto feature_uinit; return 0; feature_uinit: dfl_fpga_dev_feature_uinit(pdev); exit: return ret; } static int fme_remove(struct platform_device *pdev) { dfl_fpga_dev_ops_unregister(pdev); dfl_fpga_dev_feature_uinit(pdev); return 0; } static struct platform_driver fme_driver = { .driver = { .name = DFL_FPGA_FEATURE_DEV_FME, }, .probe = fme_probe, .remove = fme_remove, }; module_platform_driver(fme_driver); MODULE_DESCRIPTION("FPGA Management Engine driver"); MODULE_AUTHOR("Intel Corporation"); MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:dfl-fme");