Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Daniele Venzano <linux@brownhat.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The EP93xx features two PWMs (one on the EP9307) with the following
features:
* Configurable dual output
* Separate input clocks for each PWM output
* 16-bit resolution
* Programmable pulse width (duty cycle), interval (frequency), and
polarity
This adds the necessary core support as well as the driver. A sysfs
interface is provided to control the PWM outputs.
Signed-off-by: Matthieu Crapet <mcrapet@gmail.com>
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add missing register defines for ep93xx keypad clock support.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add core functions to handle writes to the ep93xx software locked
registers.
There are a number of registers in the EP93xx System Controller
that require a write to the software lock register before they
can be updated. This patch adds a number of exported functions
to the ep93xx core that handle this access.
The software locked clock divider registers, VidClkDiv, MIRClkDiv,
I2SClkDiv and KeyTchClkDiv would typically involve writing a
specific value to the register. To support this the
ep93xx_syscon_swlocked_write() function is provided.
For the DeviceCfg register it's more typical to only need to
set or clear a single bit. A generic ep93xx_devcfg_set_clear()
function is provided to handle both operations. Two inline
functions, ep93xx_devcfg_set_bits() and ep93xx_devcfg_clear_bits()
are also provided to improve code readability.
In addition, the remaining bits in the System Controller Device
Config Register have been documented and the previously defined
names shortened.
All code paths that use this functionality have been updated
except for arch/arm/kernel/crunch.c. That code is in a context
switch path, which is not reentrant, so it is safe against itself.
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: ep93xx: ensure typesafe io
For the ep93xx platform, all EP93XX_*_BASE defines are based
on virtual addresses. Ensure that all these defines are
properly typesafe for the __raw_{read/write}* macros.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Update the dma clocks so that the magic numbers are named.
All the dma clocks have an enable bit to turn them on/off as
needed. Currently these bits are in the code as "magic"
numbers. This changes all of them to named defines to
improve code readability.
Also, the EP93XX_SYSCON_CLOCK_CONTROL register is improperly
named. In the EP93xx User's Guide this register is called
PwrCnt (Power Control). All of the uses of this register
are associated with the clock support so this patch also
modifies the names to match the User's Guide.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix the clkdev API support for the ep93xx uart clocks.
The uarts available in the ep93xx have individual clock controls.
The current implementation assumes that the bootloader has enabled
the clocks before the kernel has booted. It also assumes that the
bootloader has set the UARTBAUD bit indicating that the uarts are
running off the 14.7456MHz external crystal.
This fixes both issues. It also allows the uart clocks to be stopped
when there are no users.
Tested-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Cc: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Update the rtc-ep93xx driver to use ioremap'ed addresses.
This removes the dependency on <mach/hardware.h> and properly
reports the memory addresses used by the driver in /proc/iomem.
In addition, ep93xx_rtc_init() is updated to use
platform_driver_probe() instead of platform_driver_register().
Also, the device_create_file() calls are now properly checked for
error conditions. The created sysfs files are also now removed
when the driver is removed.
The version number for the driver has been bumped at the request
of Alessandro Zummo.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add m2p dma support to the ep93xx
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds defines for the external chipselect physical base
addresses available with the EP93xx. These are meant to be used
in the platform init code.
In addition, documentation about the synchronous/asynchronous boot
modes for the EP93xx and a reference to errata about issues with
synchronous booting has been added.
Signed-off-by: <H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
