Commit Graph

8896 Commits

Author SHA1 Message Date
Linus Torvalds
2fcd8f108f This is the final part of the clk patches for this merge window.
The clk rate range series needed another week to fully bake. Maxime
 fixed the bug that broke clk notifiers and prevented this from being
 included in the first pull request. He also added a unit test on top to
 make sure it doesn't break so easily again. The majority of the series
 fixes up how the clk_set_rate_*() APIs work, particularly around when
 the rate constraints are dropped and how they move around when
 reparenting clks. Overall it's a much needed improvement to the clk rate
 range APIs that used to be pretty broken if you looked sideways.
 
 Beyond the core changes there are a few driver fixes for a compilation
 issue or improper data causing clks to fail to register or have the
 wrong parents. These are good to get in before the first -rc so that the
 system actually boots on the affected devices.
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull more clk updates from Stephen Boyd:
 "This is the final part of the clk patches for this merge window.

  The clk rate range series needed another week to fully bake. Maxime
  fixed the bug that broke clk notifiers and prevented this from being
  included in the first pull request. He also added a unit test on top
  to make sure it doesn't break so easily again. The majority of the
  series fixes up how the clk_set_rate_*() APIs work, particularly
  around when the rate constraints are dropped and how they move around
  when reparenting clks. Overall it's a much needed improvement to the
  clk rate range APIs that used to be pretty broken if you looked
  sideways.

  Beyond the core changes there are a few driver fixes for a compilation
  issue or improper data causing clks to fail to register or have the
  wrong parents. These are good to get in before the first -rc so that
  the system actually boots on the affected devices"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (31 commits)
  clk: tegra: Fix Tegra PWM parent clock
  clk: at91: fix the build with binutils 2.27
  clk: qcom: gcc-msm8660: Drop hardcoded fixed board clocks
  clk: mediatek: clk-mux: Add .determine_rate() callback
  clk: tests: Add tests for notifiers
  clk: Update req_rate on __clk_recalc_rates()
  clk: tests: Add missing test case for ranges
  clk: qcom: clk-rcg2: Take clock boundaries into consideration for gfx3d
  clk: Introduce the clk_hw_get_rate_range function
  clk: Zero the clk_rate_request structure
  clk: Stop forwarding clk_rate_requests to the parent
  clk: Constify clk_has_parent()
  clk: Introduce clk_core_has_parent()
  clk: Switch from __clk_determine_rate to clk_core_round_rate_nolock
  clk: Add our request boundaries in clk_core_init_rate_req
  clk: Introduce clk_hw_init_rate_request()
  clk: Move clk_core_init_rate_req() from clk_core_round_rate_nolock() to its caller
  clk: Change clk_core_init_rate_req prototype
  clk: Set req_rate on reparenting
  clk: Take into account uncached clocks in clk_set_rate_range()
  ...
2022-10-16 11:08:19 -07:00
Linus Torvalds
ca1aaf9937 ARM: fixes for 6.1
These are three fixes for build warnings that came in during the
 merge window.
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Merge tag 'arm-fixes-6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "These are three fixes for build warnings that came in during the merge
  window"

* tag 'arm-fixes-6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: mmp: Make some symbols static
  ARM: spear6xx: Staticize few definitions
  clk: spear: Move prototype to accessible header
2022-10-14 13:44:53 -07:00
Stephen Boyd
a7b78befbc Merge branch 'clk-rate-range' into clk-next
- Various clk rate range fixes
 - Drop clk rate range constraints on clk_put() (redux)

* clk-rate-range: (28 commits)
  clk: mediatek: clk-mux: Add .determine_rate() callback
  clk: tests: Add tests for notifiers
  clk: Update req_rate on __clk_recalc_rates()
  clk: tests: Add missing test case for ranges
  clk: qcom: clk-rcg2: Take clock boundaries into consideration for gfx3d
  clk: Introduce the clk_hw_get_rate_range function
  clk: Zero the clk_rate_request structure
  clk: Stop forwarding clk_rate_requests to the parent
  clk: Constify clk_has_parent()
  clk: Introduce clk_core_has_parent()
  clk: Switch from __clk_determine_rate to clk_core_round_rate_nolock
  clk: Add our request boundaries in clk_core_init_rate_req
  clk: Introduce clk_hw_init_rate_request()
  clk: Move clk_core_init_rate_req() from clk_core_round_rate_nolock() to its caller
  clk: Change clk_core_init_rate_req prototype
  clk: Set req_rate on reparenting
  clk: Take into account uncached clocks in clk_set_rate_range()
  clk: tests: Add some tests for orphan with multiple parents
  clk: tests: Add tests for mux with multiple parents
  clk: tests: Add tests for single parent mux
  ...
2022-10-14 13:44:44 -07:00
Jon Hunter
c461c677a8 clk: tegra: Fix Tegra PWM parent clock
Commit 8c193f4714 ("pwm: tegra: Optimize period calculation") updated
the period calculation in the Tegra PWM driver and now returns an error
if the period requested is less than minimum period supported. This is
breaking PWM support on various Tegra platforms. For example, on the
Tegra210 Jetson Nano platform this is breaking the PWM fan support and
probing the PWM fan driver now fails ...

 pwm-fan pwm-fan: Failed to configure PWM: -22
 pwm-fan: probe of pwm-fan failed with error -22

The problem is that the default parent clock for the PWM on Tegra210 is
a 32kHz clock and is unable to support the requested PWM period.

Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by
updating the parent clock for the PWM to be the PLL_P.

Fixes: 8c193f4714 ("pwm: tegra: Optimize period calculation")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # TF101 T20
Tested-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> # TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # TF201 T30
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # TF700T T3
Link: https://lore.kernel.org/r/20221010100046.6477-1-jonathanh@nvidia.com
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-14 13:44:24 -07:00
Linus Walleij
8c7bc6ca37 clk: qcom: gcc-msm8660: Drop hardcoded fixed board clocks
These two clocks are now registered in the device tree as fixed clocks,
causing a regression in the driver as the clock already exists with
e.g. the name "pxo_board" as the MSM8660 GCC driver probes.

Fix this by just not hard-coding this anymore and everything works
like a charm.

Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: baecbda529 ("ARM: dts: qcom: msm8660: fix node names for fixed clocks")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221013140745.7801-1-linus.walleij@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-14 13:39:09 -07:00
AngeloGioacchino Del Regno
b05ea33143 clk: mediatek: clk-mux: Add .determine_rate() callback
Since commit 262ca38f4b ("clk: Stop forwarding clk_rate_requests
to the parent"), the clk_rate_request is .. as the title says, not
forwarded anymore to the parent: this produces an issue with the
MediaTek clock MUX driver during GPU DVFS on MT8195, but not on
MT8192 or others.

This is because, differently from others, like MT8192 where all of
the clocks in the MFG parents tree are of mtk_mux type, but in the
parent tree of MT8195's MFG clock, we have one mtk_mux clock and
one (clk framework generic) mux clock, like so:

names: mfg_bg3d -> mfg_ck_fast_ref -> top_mfg_core_tmp (or) mfgpll
types: mtk_gate ->      mux        ->     mtk_mux      (or) mtk_pll

To solve this issue and also keep the GPU DVFS clocks code working
as expected, wire up a .determine_rate() callback for the mtk_mux
ops; for that, the standard clk_mux_determine_rate_flags() was used
as it was possible to.

This commit was successfully tested on MT6795 Xperia M5, MT8173 Elm,
MT8192 Spherion and MT8195 Tomato; no regressions were seen.

For the sake of some more documentation about this issue here's the
trace of it:

[   12.211587] ------------[ cut here ]------------
[   12.211589] WARNING: CPU: 6 PID: 78 at drivers/clk/clk.c:1462 clk_core_init_rate_req+0x84/0x90
[   12.211593] Modules linked in: stp crct10dif_ce mtk_adsp_common llc rfkill snd_sof_xtensa_dsp
               panfrost(+) sbs_battery cros_ec_lid_angle cros_ec_sensors snd_sof_of
               cros_ec_sensors_core hid_multitouch cros_usbpd_logger snd_sof gpu_sched
               snd_sof_utils fuse ipv6
[   12.211614] CPU: 6 PID: 78 Comm: kworker/u16:2 Tainted: G        W          6.0.0-next-20221011+ #58
[   12.211616] Hardware name: Acer Tomato (rev2) board (DT)
[   12.211617] Workqueue: devfreq_wq devfreq_monitor
[   12.211620] pstate: 40400009 (nZcv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[   12.211622] pc : clk_core_init_rate_req+0x84/0x90
[   12.211625] lr : clk_core_forward_rate_req+0xa4/0xe4
[   12.211627] sp : ffff80000893b8e0
[   12.211628] x29: ffff80000893b8e0 x28: ffffdddf92f9b000 x27: ffff46a2c0e8bc05
[   12.211632] x26: ffff46a2c1041200 x25: 0000000000000000 x24: 00000000173eed80
[   12.211636] x23: ffff80000893b9c0 x22: ffff80000893b940 x21: 0000000000000000
[   12.211641] x20: ffff46a2c1039f00 x19: ffff46a2c1039f00 x18: 0000000000000000
[   12.211645] x17: 0000000000000038 x16: 000000000000d904 x15: 0000000000000003
[   12.211649] x14: ffffdddf9357ce48 x13: ffffdddf935e71c8 x12: 000000000004803c
[   12.211653] x11: 00000000a867d7ad x10: 00000000a867d7ad x9 : ffffdddf90c28df4
[   12.211657] x8 : ffffdddf9357a980 x7 : 0000000000000000 x6 : 0000000000000004
[   12.211661] x5 : ffffffffffffffc8 x4 : 00000000173eed80 x3 : ffff80000893b940
[   12.211665] x2 : 00000000173eed80 x1 : ffff80000893b940 x0 : 0000000000000000
[   12.211669] Call trace:
[   12.211670]  clk_core_init_rate_req+0x84/0x90
[   12.211673]  clk_core_round_rate_nolock+0xe8/0x10c
[   12.211675]  clk_mux_determine_rate_flags+0x174/0x1f0
[   12.211677]  clk_mux_determine_rate+0x1c/0x30
[   12.211680]  clk_core_determine_round_nolock+0x74/0x130
[   12.211682]  clk_core_round_rate_nolock+0x58/0x10c
[   12.211684]  clk_core_round_rate_nolock+0xf4/0x10c
[   12.211686]  clk_core_set_rate_nolock+0x194/0x2ac
[   12.211688]  clk_set_rate+0x40/0x94
[   12.211691]  _opp_config_clk_single+0x38/0xa0
[   12.211693]  _set_opp+0x1b0/0x500
[   12.211695]  dev_pm_opp_set_rate+0x120/0x290
[   12.211697]  panfrost_devfreq_target+0x3c/0x50 [panfrost]
[   12.211705]  devfreq_set_target+0x8c/0x2d0
[   12.211707]  devfreq_update_target+0xcc/0xf4
[   12.211708]  devfreq_monitor+0x40/0x1d0
[   12.211710]  process_one_work+0x294/0x664
[   12.211712]  worker_thread+0x7c/0x45c
[   12.211713]  kthread+0x104/0x110
[   12.211716]  ret_from_fork+0x10/0x20
[   12.211718] irq event stamp: 7102
[   12.211719] hardirqs last  enabled at (7101): [<ffffdddf904ea5a0>] finish_task_switch.isra.0+0xec/0x2f0
[   12.211723] hardirqs last disabled at (7102): [<ffffdddf91794b74>] el1_dbg+0x24/0x90
[   12.211726] softirqs last  enabled at (6716): [<ffffdddf90410be4>] __do_softirq+0x414/0x588
[   12.211728] softirqs last disabled at (6507): [<ffffdddf904171d8>] ____do_softirq+0x18/0x24
[   12.211730] ---[ end trace 0000000000000000 ]---

Fixes: 262ca38f4b ("clk: Stop forwarding clk_rate_requests to the parent")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221011135548.318323-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-14 13:38:20 -07:00
Maxime Ripard
589a200488 clk: tests: Add tests for notifiers
We're recently encountered a regression due to the rates reported
through the clk_notifier_data being off when changing parents.

Let's add a test suite and a test to make sure that we do get notified
and with the proper rates.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221010-rpi-clk-fixes-again-v1-2-d87ba82ac404@cerno.tech
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-10 20:37:50 -07:00
Maxime Ripard
096f2a0c64 clk: Update req_rate on __clk_recalc_rates()
Commit cb1b1dd962 ("clk: Set req_rate on reparenting") introduced a
new function, clk_core_update_orphan_child_rates(), that updates the
req_rate field on reparenting.

It turns out that that function will interfere with the clock notifying
done by __clk_recalc_rates(). This ends up reporting the new rate in
both the old_rate and new_rate fields of struct clk_notifier_data.

Since clk_core_update_orphan_child_rates() is basically
__clk_recalc_rates() without the notifiers, and with the req_rate field
update, we can drop clk_core_update_orphan_child_rates() entirely, and
make __clk_recalc_rates() update req_rate.

However, __clk_recalc_rates() is being called in several code paths:
when retrieving a rate (most likely through clk_get_rate()), when changing
parents (through clk_set_rate() or clk_hw_reparent()), or when updating
the orphan status (through clk_core_reparent_orphans_nolock(), called at
registration).

Updating req_rate on reparenting or initialisation makes sense, but we
shouldn't do it on clk_get_rate(). Thus an extra flag has been added to
update or not req_rate depending on the context.

Fixes: cb1b1dd962 ("clk: Set req_rate on reparenting")
Link: https://lore.kernel.org/linux-clk/0acc7217-762c-7c0d-45a0-55c384824ce4@samsung.com/
Link: https://lore.kernel.org/linux-clk/Y0QNSx+ZgqKSvPOC@sirena.org.uk/
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reported-by: Mark Brown <broonie@kernel.org>
Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221010-rpi-clk-fixes-again-v1-1-d87ba82ac404@cerno.tech
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-10 20:37:44 -07:00
Viresh Kumar
9afd20a5a1
clk: spear: Move prototype to accessible header
Fixes the following W=1 kernel build warning(s):

 drivers/clk/spear/spear6xx_clock.c:116:13: warning: no previous prototype for function 'spear6xx_clk_init' [-Wmissing-prototypes]

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-10-10 10:37:58 +02:00
Linus Torvalds
bdc753c7fc Here's the main clk pull request for this merge window. We have some
late breaking reports that a patch series to rework clk rate range
 support broke boot on some devices, so I've left that branch out of this
 PR. Hopefully we can get to that next week, or punt on it and let it
 bake another cycle. That means we don't really have any changes to the
 core framework this time around besides a few typo fixes. Instead this
 is all clk driver updates and fixes.
 
 The usual suspects are here (again), with Qualcomm dominating the
 diffstat. We look to have gained support for quite a few new Qualcomm
 SoCs and Dmitry worked on updating many of the existing Qualcomm drivers
 to use clk_parent_data. After that we have MediaTek drivers getting some
 much needed updates, in particular to support GPU DVFS. There are also
 quite a few Samsung clk driver patches, but that's mostly because there
 was a maintainer change and so last release we missed some of those
 patches.
 
 Overall things look normal, but I'm slowly reviewing core framework code
 nowadays and that shows given the rate range patches had to be yanked
 last minute. Let's hope this situation changes soon.
 
 New Drivers:
  - Support for Renesas VersaClock7 clock generator family
  - Add Spreadtrum UMS512 SoC clk support
  - New clock drivers for MediaTek Helio X10 MT6795
  - Display clks for Qualcomm SM6115, SM8450
  - GPU clks for Qualcomm SC8280XP
  - Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers
 
 Deleted Drivers:
  - Remove DaVinci DM644x and DM646x clk driver support
 
 Updates:
  - Convert Baikal-T1 CCU driver to platform driver
  - Split reset support out of primary Baikal-T1 CCU driver
  - Add some missing clks required for RPiVid Video Decoder on RaspberryPi
  - Mark PLLC critical on bcm2835
  - More devm helpers for fixed rate registration
  - Various PXA168 clk driver fixes
  - Add resets for MediaTek MT8195 PCIe and USB
  - Miscellaneous of_node_put() fixes
  - Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock
  - Convert gpio-clk-gate binding to YAML
  - Various fixes to AMD/Xilinx Zynqmp clk driver
  - Graduate AMD/Xilinx "clocking wizard" driver from staging
  - Add missing DPI1_HDMI clock in MT8195 VDOSYS1
  - Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
    - Fix GPU clock topology on MT8195
    - Propogate rate changes from GPU clock gate up the tree
    - Clock mux notifiers for GPU-related PLLs
  - Conversion of more "simple" drivers to mtk_clk_simple_probe()
  - Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
  - Fixes to previous |struct clk| to |struct clk_hw| conversion on MediaTek
  - Shrink MT8192 clock driver by deduplicating clock parent lists
  - Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
    clocks for i.MX8MP
  - Drop unnecessary newline in i.MX8MM dt-bindings
  - Add more MU1 and SAI clocks dt-bindings Ids
  - Introduce slice busy bit check for i.MX93 composite clock
  - Introduce white list bit check for i.MX93 composite clock
  - Add new i.MX93 clock gate
  - Add MU1 and MU2 clocks to i.MX93 clock provider
  - Add SAI IPG clocks to i.MX93 clock provider
  - add generic clocks for U(S)ART available on SAMA5D2 SoCs
  - reset controller support for Polarfire clocks
  - .round_rate and .set rate support for clk-mpfs
  - code cleanup for clk-mpfs
  - PLL support for PolarFire SoC's Clock Conditioning Circuitry
  - Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car V4H
  - Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
  - Add I2C clocks and resets on RZ/V2M
  - Document clock support for the RZ/Five SoC
  - mux-variant clock using the table variant to select parents
  - clock controller for the rv1126 soc
  - conversion of rk3128 to yaml and relicensing of the yaml bindings
    to gpl2+MIT (following dt-binding guildelines)
  - Exynos7885: add FSYS, TREX and MFC clock controllers
  - Exynos850: add IS and AUD (audio) clock controllers with bindings
  - ExynosAutov9: add FSYS clock controllers with bindings
  - ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
    controllers, due to duplicated entries.  This is an acceptable ABI
    break: recently developed/added platform so without legacies, acked
    by known users/developers
  - ExynosAutov9: add few missing Peric 0/1 gates
  - ExynosAutov9: correct register offsets of few Peric 0/1 clocks
  - Minor code improvements (use of_device_get_match_data() helper, code
    style)
  - Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as he
    already maintainers that architecture/platform
  - Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving retention
    issues during suspend of USB on Qualcomm sc7180/sc7280 and SC8280XP
  - Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
  - Qualcomm SDM660 SDCC1 moved to floor clk ops
  - Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018 was
    added/fixed
  - The Qualcomm MSM8996 CPU clocks are updated with support for ACD
  - Support for Qualcomm SDM670 GCC and RPMh clks was added
  - Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
    num_parents was done for many Qualcomm SoCs
  - Support for per-reset defined delay on Qualcomm was introduced
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have some late breaking reports that a patch series to rework clk
  rate range support broke boot on some devices, so I've left that
  branch out of this. Hopefully we can get to that next week, or punt on
  it and let it bake another cycle. That means we don't really have any
  changes to the core framework this time around besides a few typo
  fixes. Instead this is all clk driver updates and fixes.

  The usual suspects are here (again), with Qualcomm dominating the
  diffstat. We look to have gained support for quite a few new Qualcomm
  SoCs and Dmitry worked on updating many of the existing Qualcomm
  drivers to use clk_parent_data. After that we have MediaTek drivers
  getting some much needed updates, in particular to support GPU DVFS.
  There are also quite a few Samsung clk driver patches, but that's
  mostly because there was a maintainer change and so last release we
  missed some of those patches.

  Overall things look normal, but I'm slowly reviewing core framework
  code nowadays and that shows given the rate range patches had to be
  yanked last minute. Let's hope this situation changes soon.

  New Drivers:
   - Support for Renesas VersaClock7 clock generator family
   - Add Spreadtrum UMS512 SoC clk support
   - New clock drivers for MediaTek Helio X10 MT6795
   - Display clks for Qualcomm SM6115, SM8450
   - GPU clks for Qualcomm SC8280XP
   - Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers

  Deleted Drivers:
   - Remove DaVinci DM644x and DM646x clk driver support

  Updates:
   - Convert Baikal-T1 CCU driver to platform driver
   - Split reset support out of primary Baikal-T1 CCU driver
   - Add some missing clks required for RPiVid Video Decoder on
     RaspberryPi
   - Mark PLLC critical on bcm2835
   - More devm helpers for fixed rate registration
   - Various PXA168 clk driver fixes
   - Add resets for MediaTek MT8195 PCIe and USB
   - Miscellaneous of_node_put() fixes
   - Nuke dt-bindings/clk path (again) by moving headers to
     dt-bindings/clock
   - Convert gpio-clk-gate binding to YAML
   - Various fixes to AMD/Xilinx Zynqmp clk driver
   - Graduate AMD/Xilinx "clocking wizard" driver from staging
   - Add missing DPI1_HDMI clock in MT8195 VDOSYS1
   - Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
   - Fix GPU clock topology on MT8195
   - Propogate rate changes from GPU clock gate up the tree
   - Clock mux notifiers for GPU-related PLLs
   - Conversion of more "simple" drivers to mtk_clk_simple_probe()
   - Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
   - Fixes to previous |struct clk| to |struct clk_hw| conversion on
     MediaTek
   - Shrink MT8192 clock driver by deduplicating clock parent lists
   - Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
     clocks for i.MX8MP
   - Drop unnecessary newline in i.MX8MM dt-bindings
   - Add more MU1 and SAI clocks dt-bindings Ids
   - Introduce slice busy bit check for i.MX93 composite clock
   - Introduce white list bit check for i.MX93 composite clock
   - Add new i.MX93 clock gate
   - Add MU1 and MU2 clocks to i.MX93 clock provider
   - Add SAI IPG clocks to i.MX93 clock provider
   - add generic clocks for U(S)ART available on SAMA5D2 SoCs
   - reset controller support for Polarfire clocks
   - .round_rate and .set rate support for clk-mpfs
   - code cleanup for clk-mpfs
   - PLL support for PolarFire SoC's Clock Conditioning Circuitry
   - Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car
     V4H
   - Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
   - Add I2C clocks and resets on RZ/V2M
   - Document clock support for the RZ/Five SoC
   - mux-variant clock using the table variant to select parents
   - clock controller for the rv1126 soc
   - conversion of rk3128 to yaml and relicensing of the yaml bindings
     to gpl2+MIT (following dt-binding guildelines)
   - Exynos7885: add FSYS, TREX and MFC clock controllers
   - Exynos850: add IS and AUD (audio) clock controllers with bindings
   - ExynosAutov9: add FSYS clock controllers with bindings
   - ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
     controllers, due to duplicated entries. This is an acceptable ABI
     break: recently developed/added platform so without legacies, acked
     by known users/developers
   - ExynosAutov9: add few missing Peric 0/1 gates
   - ExynosAutov9: correct register offsets of few Peric 0/1 clocks
   - Minor code improvements (use of_device_get_match_data() helper,
     code style)
   - Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as
     he already maintainers that architecture/platform
   - Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving
     retention issues during suspend of USB on Qualcomm sc7180/sc7280
     and SC8280XP
   - Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
   - Qualcomm SDM660 SDCC1 moved to floor clk ops
   - Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018
     was added/fixed
   - The Qualcomm MSM8996 CPU clocks are updated with support for ACD
   - Support for Qualcomm SDM670 GCC and RPMh clks was added
   - Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
     num_parents was done for many Qualcomm SoCs
   - Support for per-reset defined delay on Qualcomm was introduced"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (283 commits)
  clk: qcom: gcc-sm6375: Ensure unsigned long type
  clk: qcom: gcc-sm6375: Remove unused variables
  clk: qcom: kpss-xcc: convert to parent data API
  clk: introduce (devm_)hw_register_mux_parent_data_table API
  clk: allow building lan966x as a module
  clk: clk-xgene: simplify if-if to if-else
  clk: ast2600: BCLK comes from EPLL
  clk: clocking-wizard: Depend on HAS_IOMEM
  clk: clocking-wizard: Use dev_err_probe() helper
  clk: nxp: fix typo in comment
  clk: pxa: add a check for the return value of kzalloc()
  clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
  dt-bindings: clock: vc5: Add 5P49V6975
  clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
  clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
  clk: Renesas versaclock7 ccf device driver
  dt-bindings: Renesas versaclock7 device tree bindings
  clk: ti: Balance of_node_get() calls for of_find_node_by_name()
  clk: imx: scu: fix memleak on platform_device_add() fails
  clk: vc5: Use regmap_{set,clear}_bits() where appropriate
  ...
2022-10-08 10:06:48 -07:00
Linus Torvalds
b86406d42a * 'remove' callback converted to return void. Big change with trivial
fixes all over the tree. Other subsystems depending on this change
   have been asked to pull an immutable topic branch for this.
 * new driver for Microchip PCI1xxxx switch
 * heavy refactoring of the Mellanox BlueField driver
 * we prefer async probe in the i801 driver now
 * the rest is usual driver updates (support for more SoCs, some
   refactoring, some feature additions)
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Merge tag 'i2c-for-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c updates from Wolfram Sang:

 - 'remove' callback converted to return void. Big change with trivial
   fixes all over the tree. Other subsystems depending on this change
   have been asked to pull an immutable topic branch for this.

 - new driver for Microchip PCI1xxxx switch

 - heavy refactoring of the Mellanox BlueField driver

 - we prefer async probe in the i801 driver now

 - the rest is usual driver updates (support for more SoCs, some
   refactoring, some feature additions)

* tag 'i2c-for-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (37 commits)
  i2c: pci1xxxx: prevent signed integer overflow
  i2c: acpi: Replace zero-length array with DECLARE_FLEX_ARRAY() helper
  i2c: i801: Prefer async probe
  i2c: designware-pci: Use standard pattern for memory allocation
  i2c: designware-pci: Group AMD NAVI quirk parts together
  i2c: microchip: pci1xxxx: Add driver for I2C host controller in multifunction endpoint of pci1xxxx switch
  docs: i2c: slave-interface: return errno when handle I2C_SLAVE_WRITE_REQUESTED
  i2c: mlxbf: remove device tree support
  i2c: mlxbf: support BlueField-3 SoC
  i2c: cadence: Add standard bus recovery support
  i2c: mlxbf: add multi slave functionality
  i2c: mlxbf: support lock mechanism
  macintosh/ams: Adapt declaration of ams_i2c_remove() to earlier change
  i2c: riic: Use devm_platform_ioremap_resource()
  i2c: mlxbf: remove IRQF_ONESHOT
  dt-bindings: i2c: rockchip: add rockchip,rk3128-i2c
  dt-bindings: i2c: renesas,rcar-i2c: Add r8a779g0 support
  i2c: tegra: Add GPCDMA support
  i2c: scmi: Convert to be a platform driver
  i2c: rk3x: Add rv1126 support
  ...
2022-10-04 18:54:33 -07:00
Stephen Boyd
f9efefdba9 Merge branches 'clk-baikal', 'clk-broadcom', 'clk-vc5' and 'clk-versaclock' into clk-next
- Convert Baikal-T1 CCU driver to platform driver
 - Split reset support out of primary Baikal-T1 CCU driver
 - Add some missing clks required for RPiVid Video Decoder on RaspberryPi
 - Mark PLLC critical on bcm2835
 - Support for Renesas VersaClock7 clock generator family

* clk-baikal:
  clk: baikal-t1: Convert to platform device driver
  clk: baikal-t1: Add DDR/PCIe directly controlled resets support
  dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs
  clk: baikal-t1: Move reset-controls code into a dedicated module
  clk: baikal-t1: Add SATA internal ref clock buffer
  clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parent
  clk: baikal-t1: Fix invalid xGMAC PTP clock divider
  clk: vc5: Fix 5P49V6901 outputs disabling when enabling FOD

* clk-broadcom:
  clk: bcm: rpi: Add support for VEC clock
  clk: bcm: rpi: Handle pixel clock in firmware
  clk: bcm: rpi: Add support HEVC clock
  clk: bcm2835: fix bcm2835_clock_rate_from_divisor declaration
  clk: bcm2835: Round UART input clock up
  clk: bcm2835: Make peripheral PLLC critical

* clk-vc5:
  clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
  dt-bindings: clock: vc5: Add 5P49V6975
  clk: vc5: Use regmap_{set,clear}_bits() where appropriate
  clk: vc5: Check IO access results

* clk-versaclock:
  clk: Renesas versaclock7 ccf device driver
  dt-bindings: Renesas versaclock7 device tree bindings
2022-10-04 10:54:34 -07:00
Stephen Boyd
b7f257ceb3 Merge branches 'clk-fixed-rate', 'clk-spreadtrum', 'clk-pxa' and 'clk-ti' into clk-next
- More devm helpers for fixed rate registration
 - Add Spreadtrum UMS512 SoC clk support
 - Various PXA168 clk driver fixes

* clk-fixed-rate:
  clk: fixed-rate: add devm_clk_hw_register_fixed_rate
  clk: asm9260: use parent index to link the reference clock

* clk-spreadtrum:
  clk: sprd: Add clocks support for UMS512

* clk-pxa:
  clk: pxa: add a check for the return value of kzalloc()
  clk: mmp: pxa168: control shared SDH bits with separate clock
  dt-bindings: marvell,pxa168: add clock ids for SDH AXI clocks
  clk: mmp: pxa168: add clocks for SDH2 and SDH3
  dt-bindings: marvell,pxa168: add clock id for SDH3
  clk: mmp: pxa168: fix GPIO clock enable bits
  clk: mmp: pxa168: add muxes for more peripherals
  clk: mmp: pxa168: fix incorrect parent clocks
  clk: mmp: pxa168: fix const-correctness
  clk: mmp: pxa168: add new clocks for peripherals
  dt-bindings: marvell,pxa168: add clock ids for additional dividers
  clk: mmp: pxa168: fix incorrect dividers
  clk: mmp: pxa168: add additional register defines

* clk-ti:
  clk: davinci: cfgchip: Use dev_err_probe() helper
  clk: davinci: pll: fix spelling typo in comment
  MAINTAINERS: add header file to TI DAVINCI SERIES CLOCK DRIVER
2022-10-04 10:54:14 -07:00
Stephen Boyd
26bebbfed5 Merge branches 'clk-rockchip', 'clk-renesas', 'clk-microchip', 'clk-allwinner' and 'clk-imx' into clk-next
* clk-rockchip:
  dt-bindings: clock: rockchip: change SPDX-License-Identifier
  dt-bindings: clock: convert rockchip,rk3128-cru.txt to YAML
  clk: rockchip: Add clock controller support for RV1126 SoC
  dt-bindings: clock: rockchip: Document RV1126 CRU
  clk: rockchip: Add dt-binding header for RV1126
  clk: rockchip: Add MUXTBL variant

* clk-renesas:
  clk: renesas: r8a779g0: Add EtherAVB clocks
  clk: renesas: r8a779g0: Add PFC/GPIO clocks
  clk: renesas: r8a779g0: Add I2C clocks
  clk: renesas: r8a779g0: Add watchdog clock
  dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC
  clk: renesas: r8a779f0: Add MSIOF clocks
  clk: renesas: r9a09g011: Add IIC clock and reset entries
  clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info
  clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
  clk: renesas: r8a779f0: Add CMT clocks
  clk: renesas: r8a779f0: Add SDH0 clock

* clk-microchip:
  clk: at91: sama5d2: Add Generic Clocks for UART/USART
  clk: microchip: add PolarFire SoC fabric clock support
  dt-bindings: clk: add PolarFire SoC fabric clock ids
  dt-bindings: clk: document PolarFire SoC fabric clocks
  dt-bindings: clk: rename mpfs-clkcfg binding
  clk: microchip: mpfs: update module authorship & licencing
  clk: microchip: mpfs: convert periph_clk to clk_gate
  clk: microchip: mpfs: convert cfg_clk to clk_divider
  clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo()
  clk: microchip: mpfs: simplify control reg access
  clk: microchip: mpfs: move id & offset out of clock structs
  clk: microchip: mpfs: add MSS pll's set & round rate
  MAINTAINERS: add polarfire soc reset controller
  reset: add polarfire soc reset support
  clk: microchip: mpfs: add reset controller
  dt-bindings: clk: microchip: mpfs: add reset controller support
  clk: microchip: mpfs: make the rtc's ahb clock critical
  clk: microchip: mpfs: fix clk_cfg array bounds violation

* clk-allwinner:
  clk: sunxi-ng: ccu-sun9i-a80-usb: Use dev_err_probe() helper
  clk: sunxi-ng: ccu-sun9i-a80-de: Use dev_err_probe() helper
  clk: sunxi-ng: sun8i-de2: Use dev_err_probe() helper
  clk: sunxi-ng: d1: Limit PLL rates to stable ranges

* clk-imx:
  clk: imx: scu: fix memleak on platform_device_add() fails
  clk: imx93: add SAI IPG clk
  clk: imx93: add MU1/2 clock
  clk: imx93: switch to use new clk gate API
  clk: imx: add i.MX93 clk gate
  clk: imx: clk-composite-93: check white_list
  clk: imx: clk-composite-93: check slice busy
  dt-bindings: clock: imx93-clock: add more MU/SAI clocks
  dt-bindings: clock: imx8mm: don't use multiple blank lines
  clk: imx8mp: tune the order of enet_qos_root_clk
2022-10-04 10:54:02 -07:00
Stephen Boyd
a64b79c01c Merge branches 'clk-samsung', 'clk-mtk', 'clk-rm', 'clk-ast' and 'clk-qcom' into clk-next
- Add resets for MediaTek MT8195 PCIe and USB
 - Remove DaVinci DM644x and DM646x clk driver support

* clk-samsung:
  clk: samsung: MAINTAINERS: add Krzysztof Kozlowski
  clk: samsung: exynos850: Implement CMU_MFCMSCL domain
  clk: samsung: exynos850: Implement CMU_IS domain
  clk: samsung: exynos850: Implement CMU_AUD domain
  clk: samsung: exynos850: Style fixes
  clk: samsung: exynosautov9: add fsys1 clock support
  clk: samsung: exynosautov9: add fsys0 clock support
  clk: samsung: exynosautov9: correct register offsets of peric0/c1
  clk: samsung: exynosautov9: add missing gate clks for peric0/c1
  dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL
  dt-bindings: clock: exynos850: Add Exynos850 CMU_IS
  dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD
  dt-bindings: clock: exynosautov9: add schema for cmu_fsys0/1
  dt-bindings: clock: exynosautov9: add fsys1 clock definitions
  dt-bindings: clock: exynosautov9: add fys0 clock definitions
  clk: samsung: exynos7885: Add TREX clocks
  clk: samsung: exynos7885: Implement CMU_FSYS domain
  dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1
  clk: samsung: exynos-clkout: Use of_device_get_match_data()

* clk-mtk: (42 commits)
  clk: mediatek: add driver for MT8365 SoC
  clk: mediatek: Export required common code symbols
  clk: mediatek: Provide mtk_devm_alloc_clk_data
  dt-bindings: clock: mediatek: add bindings for MT8365 SoC
  clk: mediatek: mt8192: deduplicate parent clock lists
  clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*()
  clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanup
  clk: mediatek: clk-mt8192: Add clock mux notifier for mfg_pll_sel
  clk: mediatek: clk-mt8192-mfg: Propagate rate changes to parent
  clk: mediatek: clk-mt8195-topckgen: Drop univplls from mfg mux parents
  clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifier
  clk: mediatek: clk-mt8195-topckgen: Register mfg_ck_fast_ref as generic mux
  clk: mediatek: clk-mt8195-mfg: Reparent mfg_bg3d and propagate rate changes
  clk: mediatek: mt8183: Add clk mux notifier for MFG mux
  clk: mediatek: mux: add clk notifier functions
  clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent
  clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probe
  clk: mediatek: gate: Export mtk_clk_register_gates_with_dev
  clk: mediatek: add VDOSYS1 clock
  dt-bindings: clk: mediatek: Add MT8195 DPI clocks
  ...

* clk-rm:
  clk: davinci: remove PLL and PSC clocks for DaVinci DM644x and DM646x

* clk-ast:
  clk: ast2600: BCLK comes from EPLL

* clk-qcom: (97 commits)
  clk: qcom: gcc-sm6375: Ensure unsigned long type
  clk: qcom: gcc-sm6375: Remove unused variables
  clk: qcom: kpss-xcc: convert to parent data API
  clk: introduce (devm_)hw_register_mux_parent_data_table API
  clk: qcom: gcc-msm8939: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8939: use parent_hws where possible
  dt-bindings: clock: move qcom,gcc-msm8939 to qcom,gcc-msm8916.yaml
  clk: qcom: gcc-sm6350: Update the .pwrsts for usb gdscs
  clk: qcom: gcc-sc8280xp: use retention for USB power domains
  clk: qcom: gdsc: add missing error handling
  dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos
  clk: qcom: Add global clock controller driver for SM6375
  dt-bindings: clock: add SM6375 QCOM global clock bindings
  clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit
  clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscs
  clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdsc
  clk: qcom: gdsc: Fix the handling of PWRSTS_RET support
  clk: qcom: Add SC8280XP GPU clock controller
  dt-bindings: clock: Add Qualcomm SC8280XP GPU binding
  clk: qcom: smd: Add SM6375 clocks
  ...
2022-10-04 10:53:41 -07:00
Stephen Boyd
49f4c2d101 Merge branches 'clk-ofnode', 'clk-bindings', 'clk-cleanup', 'clk-zynq' and 'clk-xilinx' into clk-next
- Miscellaneous of_node_put() fixes
 - Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock
 - Convert gpio-clk-gate binding to YAML
 - Various fixes to AMD/Xilinx Zynqmp clk driver
 - Graduate AMD/Xilinx "clocking wizard" driver from staging

* clk-ofnode:
  clk: ti: Balance of_node_get() calls for of_find_node_by_name()
  clk: tegra20: Fix refcount leak in tegra20_clock_init
  clk: tegra: Fix refcount leak in tegra114_clock_init
  clk: tegra: Fix refcount leak in tegra210_clock_init
  clk: sprd: Hold reference returned by of_get_parent()
  clk: berlin: Add of_node_put() for of_get_parent()
  clk: at91: dt-compat: Hold reference returned by of_get_parent()
  clk: qoriq: Hold reference returned by of_get_parent()
  clk: oxnas: Hold reference returned by of_get_parent()
  clk: st: Hold reference returned by of_get_parent()
  clk: tegra: Add missing of_node_put()
  clk: meson: Hold reference returned by of_get_parent()
  clk: nomadik: Add missing of_node_put()

* clk-bindings:
  dt-bindings: clock: drop minItems equal to maxItems
  dt-bindings: clock: gpio-gate-clock: Convert to json-schema
  dt-bindings: clock: Move versaclock.h to dt-bindings/clock
  dt-bindings: clock: Move lochnagar.h to dt-bindings/clock

* clk-cleanup:
  clk: allow building lan966x as a module
  clk: clk-xgene: simplify if-if to if-else
  clk: nxp: fix typo in comment
  clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
  clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
  clkdev: Simplify devm_clk_hw_register_clkdev() function
  clkdev: Remove never used devm_clk_release_clkdev()
  clk: Remove never used devm_of_clk_del_provider()
  clk: pistachio: Fix initconst confusion
  clk: clk-npcm7xx: Remove unused struct npcm7xx_clk_gate_data and npcm7xx_clk_div_fixed_data
  clk: do not initialize ret
  clk: remove extra empty line
  clk: Fix comment typo
  clk: move from strlcpy with unused retval to strscpy

* clk-zynq:
  clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate
  clk: zynqmp: Check the return type zynqmp_pm_query_data
  clk: zynqmp: Add a check for NULL pointer
  clk: zynqmp: Replaced strncpy() with strscpy()
  clk: zynqmp: Fix stack-out-of-bounds in strncpy`
  clk: zynqmp: make bestdiv unsigned

* clk-xilinx:
  clk: clocking-wizard: Depend on HAS_IOMEM
  clk: clocking-wizard: Use dev_err_probe() helper
  clk: clocking-wizard: Update the compatible
  clk: clocking-wizard: Fix the reconfig for 5.2
  clk: clocking-wizard: Rename nr-outputs to xlnx,nr-outputs
  clk: clocking-wizard: Move clocking-wizard out
  dt-bindings: add documentation of xilinx clocking wizard
2022-10-04 10:53:04 -07:00
Stephen Boyd
39bc9b589e clk: qcom: gcc-sm6375: Ensure unsigned long type
This PLL frequency needs a UL postfix to avoid compiler warnings on
32-bit architectures.

Fixes: 184fdd873d ("clk: qcom: Add global clock controller driver for SM6375")
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-04 10:24:26 -07:00
Konrad Dybcio
a76d550f76 clk: qcom: gcc-sm6375: Remove unused variables
gcc_parent_data_15 and gcc_parent_map_15 are not used in this driver.
Remove them.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20221003211438.25691-1-konrad.dybcio@somainline.org
Fixes: 184fdd873d ("clk: qcom: Add global clock controller driver for SM6375")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-04 10:18:19 -07:00
Christian Marangi
c3db5128e8 clk: qcom: kpss-xcc: convert to parent data API
Convert the driver to parent data API. From the Documentation pll8_vote
and pxo should be declared in the DTS so fw_name can be used instead of
parent_names. .name is changed to the legacy pxo_board following how
it's declared in other drivers.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20220914144743.17369-2-ansuelsmth@gmail.com
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 20:50:22 -07:00
Clément Léger
8a977bbb17 clk: allow building lan966x as a module
Set the COMMON_CLK_LAN966X option as a tristate and switch from
builtin_platform_driver() to module_platform_driver() to allow building
and using this driver as a module.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Link: https://lore.kernel.org/r/20220617103306.489466-1-clement.leger@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 14:14:02 -07:00
Yihao Han
ae039f0fc0 clk: clk-xgene: simplify if-if to if-else
Replace `if (!pclk->param.csr_reg)` with `else` for simplification
and add curly brackets according to the kernel coding style:

"Do not unnecessarily use braces where a single statement will do."

...

"This does not apply if only one branch of a conditional statement is
a single statement; in the latter case use braces in both branches"

Please refer to:
https://www.kernel.org/doc/html/v5.17-rc8/process/coding-style.html

Signed-off-by: Yihao Han <hanyihao@vivo.com>
Link: https://lore.kernel.org/r/20220408130617.14963-1-hanyihao@vivo.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 14:13:29 -07:00
Joel Stanley
b8c1dc9c00 clk: ast2600: BCLK comes from EPLL
This correction was made in the u-boot SDK recently. There are no
in-tree users of this clock so the impact is minimal.

Fixes: d3d04f6c33 ("clk: Add support for AST2600 SoC")
Link: 8ad54a5ae1
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220421040426.171256-1-joel@jms.id.au
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 14:12:15 -07:00
Stephen Boyd
c00b5f2040 clk: clocking-wizard: Depend on HAS_IOMEM
This driver uses devm_platform_ioremap_resource() and thus depends on
HAS_IOMEM. Add the Kconfig dependency to avoid build issues.

Reported-by: kernel test robot <lkp@intel.com>
Cc: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Fixes: c822490f52 ("clk: clocking-wizard: Move clocking-wizard out")
Link: https://lore.kernel.org/r/20221003202608.2611295-1-sboyd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 13:27:58 -07:00
Yang Yingliang
fd30ac84f3 clk: clocking-wizard: Use dev_err_probe() helper
dev_err() can be replace with dev_err_probe() which will check if error
code is -EPROBE_DEFER.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20220913031442.980720-1-yangyingliang@huawei.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 13:24:26 -07:00
Linus Torvalds
9388076b4c ACPI updates for 6.1-rc1
- Reimplement acpi_get_pci_dev() using the list of physical devices
    associated with the given ACPI device object (Rafael Wysocki).
 
  - Rename ACPI device object reference counting functions (Rafael
    Wysocki).
 
  - Rearrange ACPI device object initialization code (Rafael Wysocki).
 
  - Drop parent field from struct acpi_device (Rafael Wysocki).
 
  - Extend the the int3472-tps68470 driver to support multiple consumers
    of a single TPS68470 along with the requisite framework-level
    support (Daniel Scally).
 
  - Filter out non-memory resources in is_memory(), add a helper
    function to find all memory type resources of an ACPI device object
    and use that function in 3 places (Heikki Krogerus).
 
  - Add IRQ override quirks for Asus Vivobook K3402ZA/K3502ZA and ASUS
    model S5402ZA (Tamim Khan, Kellen Renshaw).
 
  - Fix acpi_dev_state_d0() kerneldoc (Sakari Ailus).
 
  - Fix up suspend-to-idle support on ASUS Rembrandt laptops (Mario
    Limonciello).
 
  - Clean up ACPI platform devices support code (Andy Shevchenko, John
    Garry).
 
  - Clean up ACPI bus management code (Andy Shevchenko, ye xingchen).
 
  - Add support for multiple DMA windows with different offsets to the
    ACPI device enumeration code and use it on LoongArch (Jianmin Lv).
 
  - Clean up the ACPI LPSS (Intel SoC) driver (Andy Shevchenko).
 
  - Add a quirk for Dell Inspiron 14 2-in-1 for StorageD3Enable (Mario
    Limonciello).
 
  - Drop unused dev_fmt() and redundant 'HMAT' prefix from the HMAT
    parsing code (Liu Shixin).
 
  - Make ACPI FPDT parsing code avoid calling acpi_os_map_memory() on
    invalid physical addresses (Hans de Goede).
 
  - Silence missing-declarations warning related to Apple device
    properties management (Lukas Wunner).
 
  - Disable frequency invariance in the CPPC library if registers used
    by cppc_get_perf_ctrs() are accessed via PCC (Jeremy Linton).
 
  - Add ACPI disabled check to acpi_cpc_valid() (Perry Yuan).
 
  - Fix Tx acknowledge in the PCC address space handler (Huisong Li).
 
  - Use wait_for_completion_timeout() for PCC mailbox operations (Huisong
    Li).
 
  - Release resources on PCC address space setup failure path (Rafael
    Mendonca).
 
  - Remove unneeded result variables from APEI code (ye xingchen).
 
  - Print total number of records found during BERT log parsing (Dmitry
    Monakhov).
 
  - Drop support for 3 _OSI strings that should not be necessary any
    more and update documentation on custom _OSI strings so that adding
    new ones is not encouraged any more (Mario Limonciello).
 
  - Drop unneeded result variable from ec_write() (ye xingchen).
 
  - Remove the leftover struct acpi_ac_bl from the ACPI AC driver (Hanjun
    Guo).
 
  - Reorder symbols to get rid of a few forward declarations in the ACPI
    fan driver (Uwe Kleine-König).
 
  - Add Toshiba Satellite/Portege Z830 ACPI backlight quirk (Arvid
    Norlander).
 
  - Add ARM DMA-330 controller to the supported list in the ACPI AMBA
    driver (Vijayenthiran Subramaniam).
 
  - Drop references to non-functional 01.org/linux-acpi web site from
    MAINTAINERS and Kconfig help texts (Rafael Wysocki).
 
  - Replace strlcpy() with unused retval with strscpy() in the ACPI
    support code (Wolfram Sang).
 
  - Do not initialize ret in main() in the pfrut utility (Shi junming).
 
  - Drop useless ACPI DSDT override documentation (Rafael Wysocki).
 
  - Fix a few typos and wording mistakes in the ACPI device enumeration
    documentation (Jean Delvare).
 
  - Introduce acpi_dev_uid_to_integer() to convert a _UID string into an
    integer value (Andy Shevchenko).
 
  - Use acpi_dev_uid_to_integer() in several places to unify _UID
    handling (Andy Shevchenko).
 
  - Drop unused pnpid32_to_pnpid() declaration from  PNP code (Gaosheng
    Cui).
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Merge tag 'acpi-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI updates from Rafael Wysocki:
 "ACPI and PNP updates for 6.1-rc1.

  These rearrange the ACPI device object initialization code (to get rid
  of a redundant parent pointer from struct acpi_device among other
  things), unify the _UID handling, drop support for some _OSI strings
  that should not be necessary any more, add new IDs to support more
  hardware and some more quirks, fix a few issues and clean up code all
  over.

  Specifics:

   - Reimplement acpi_get_pci_dev() using the list of physical devices
     associated with the given ACPI device object (Rafael Wysocki)

   - Rename ACPI device object reference counting functions (Rafael
     Wysocki)

   - Rearrange ACPI device object initialization code (Rafael Wysocki)

   - Drop parent field from struct acpi_device (Rafael Wysocki)

   - Extend the the int3472-tps68470 driver to support multiple
     consumers of a single TPS68470 along with the requisite
     framework-level support (Daniel Scally)

   - Filter out non-memory resources in is_memory(), add a helper
     function to find all memory type resources of an ACPI device object
     and use that function in 3 places (Heikki Krogerus)

   - Add IRQ override quirks for Asus Vivobook K3402ZA/K3502ZA and ASUS
     model S5402ZA (Tamim Khan, Kellen Renshaw)

   - Fix acpi_dev_state_d0() kerneldoc (Sakari Ailus)

   - Fix up suspend-to-idle support on ASUS Rembrandt laptops (Mario
     Limonciello)

   - Clean up ACPI platform devices support code (Andy Shevchenko, John
     Garry)

   - Clean up ACPI bus management code (Andy Shevchenko, ye xingchen)

   - Add support for multiple DMA windows with different offsets to the
     ACPI device enumeration code and use it on LoongArch (Jianmin Lv)

   - Clean up the ACPI LPSS (Intel SoC) driver (Andy Shevchenko)

   - Add a quirk for Dell Inspiron 14 2-in-1 for StorageD3Enable (Mario
     Limonciello)

   - Drop unused dev_fmt() and redundant 'HMAT' prefix from the HMAT
     parsing code (Liu Shixin)

   - Make ACPI FPDT parsing code avoid calling acpi_os_map_memory() on
     invalid physical addresses (Hans de Goede)

   - Silence missing-declarations warning related to Apple device
     properties management (Lukas Wunner)

   - Disable frequency invariance in the CPPC library if registers used
     by cppc_get_perf_ctrs() are accessed via PCC (Jeremy Linton)

   - Add ACPI disabled check to acpi_cpc_valid() (Perry Yuan)

   - Fix Tx acknowledge in the PCC address space handler (Huisong Li)

   - Use wait_for_completion_timeout() for PCC mailbox operations
     (Huisong Li)

   - Release resources on PCC address space setup failure path (Rafael
     Mendonca)

   - Remove unneeded result variables from APEI code (ye xingchen)

   - Print total number of records found during BERT log parsing (Dmitry
     Monakhov)

   - Drop support for 3 _OSI strings that should not be necessary any
     more and update documentation on custom _OSI strings so that adding
     new ones is not encouraged any more (Mario Limonciello)

   - Drop unneeded result variable from ec_write() (ye xingchen)

   - Remove the leftover struct acpi_ac_bl from the ACPI AC driver
     (Hanjun Guo)

   - Reorder symbols to get rid of a few forward declarations in the
     ACPI fan driver (Uwe Kleine-König)

   - Add Toshiba Satellite/Portege Z830 ACPI backlight quirk (Arvid
     Norlander)

   - Add ARM DMA-330 controller to the supported list in the ACPI AMBA
     driver (Vijayenthiran Subramaniam)

   - Drop references to non-functional 01.org/linux-acpi web site from
     MAINTAINERS and Kconfig help texts (Rafael Wysocki)

   - Replace strlcpy() with unused retval with strscpy() in the ACPI
     support code (Wolfram Sang)

   - Do not initialize ret in main() in the pfrut utility (Shi junming)

   - Drop useless ACPI DSDT override documentation (Rafael Wysocki)

   - Fix a few typos and wording mistakes in the ACPI device enumeration
     documentation (Jean Delvare)

   - Introduce acpi_dev_uid_to_integer() to convert a _UID string into
     an integer value (Andy Shevchenko)

   - Use acpi_dev_uid_to_integer() in several places to unify _UID
     handling (Andy Shevchenko)

   - Drop unused pnpid32_to_pnpid() declaration from PNP code (Gaosheng
     Cui)"

* tag 'acpi-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (79 commits)
  ACPI: LPSS: Deduplicate skipping device in acpi_lpss_create_device()
  ACPI: LPSS: Replace loop with first entry retrieval
  ACPI: x86: s2idle: Add another ID to s2idle_dmi_table
  ACPI: x86: s2idle: Fix a NULL pointer dereference
  MAINTAINERS: Drop records pointing to 01.org/linux-acpi
  ACPI: Kconfig: Drop link to https://01.org/linux-acpi
  ACPI: docs: Drop useless DSDT override documentation
  ACPI: DPTF: Drop stale link from Kconfig help
  ACPI: x86: s2idle: Add a quirk for ASUSTeK COMPUTER INC. ROG Flow X13
  ACPI: x86: s2idle: Add a quirk for Lenovo Slim 7 Pro 14ARH7
  ACPI: x86: s2idle: Add a quirk for ASUS ROG Zephyrus G14
  ACPI: x86: s2idle: Add a quirk for ASUS TUF Gaming A17 FA707RE
  ACPI: x86: s2idle: Add module parameter to prefer Microsoft GUID
  ACPI: x86: s2idle: If a new AMD _HID is missing assume Rembrandt
  ACPI: x86: s2idle: Move _HID handling for AMD systems into structures
  platform/x86: int3472: Add board data for Surface Go2 IR camera
  platform/x86: int3472: Support multiple gpio lookups in board data
  platform/x86: int3472: Support multiple clock consumers
  ACPI: bus: Add iterator for dependent devices
  ACPI: scan: Add acpi_dev_get_next_consumer_dev()
  ...
2022-10-03 13:19:53 -07:00
Julia Lawall
7942ac9fe9 clk: nxp: fix typo in comment
Spelling mistake (triple letters) in comment.
Detected with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>

Link: https://lore.kernel.org/r/20220521111145.81697-42-Julia.Lawall@inria.fr
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 12:34:32 -07:00
Xiaoke Wang
117a1542c0 clk: pxa: add a check for the return value of kzalloc()
kzalloc() is a memory allocation function which can return NULL when
some internal memory errors happen. So it is better to check it to
prevent potential wrong memory access.

Signed-off-by: Xiaoke Wang <xkernel.wang@foxmail.com>
Link: https://lore.kernel.org/r/tencent_2B9817738F38B02844C245946EFF3B407E09@qq.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 12:32:03 -07:00
Matthias Fend
d847383106 clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
Update IDT VersaClock 5 driver to support 5P49V6975. The 5P49V6975 is a
member of the VersaClock 6E family and supports four fractional dividers
(FODs), five clock outputs and an internal oscillator.

Signed-off-by: Matthias Fend <matthias.fend@emfend.at>
Link: https://lore.kernel.org/r/20220511053455.360335-2-matthias.fend@emfend.at
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03 11:58:16 -07:00
ye xingchen
f816ac1115 clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
Return the value of_clk_add_hw_provider() directly instead of storing it
in another redundant variable.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn>
Link: https://lore.kernel.org/r/20220906072322.337253-1-ye.xingchen@zte.com.cn
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 17:46:30 -07:00
Miaoqian Lin
9c59a01cab clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
pm_runtime_get_sync() will increment pm usage counter.
Forgetting to putting operation will result in reference leak.
Add missing pm_runtime_put_sync in some error paths.

Fixes: 9ac33b0ce8 ("CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic)")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220602030838.52057-1-linmq006@gmail.com
Reviewed-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 17:39:46 -07:00
Alex Helms
48c5e98fed clk: Renesas versaclock7 ccf device driver
Renesas Versaclock7 is a family of configurable clock generator ICs
with fractional and integer dividers. This driver has basic support
for the RC21008A device, a clock synthesizer with a crystal input and
8 outputs. The supports changing the FOD and IOD rates, and each
output can be gated.

Signed-off-by: Alex Helms <alexander.helms.jy@renesas.com>
Link: https://lore.kernel.org/r/20220912183613.22213-3-alexander.helms.jy@renesas.com
Tested-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 17:34:35 -07:00
Liang He
058a3996b8 clk: ti: Balance of_node_get() calls for of_find_node_by_name()
In ti_find_clock_provider(), of_find_node_by_name() will call
of_node_put() for the 'from' argument, possibly putting the node one too
many times. Let's maintain the of_node_get() from the previous search
and only put when we're exiting the function early. This should avoid a
misbalanced reference count on the node.

Fixes: 51f661ef9a ("clk: ti: Add ti_find_clock_provider() to use clock-output-names")
Signed-off-by: Liang He <windhl@126.com>
Link: https://lore.kernel.org/r/20220915031121.4003589-1-windhl@126.com
[sboyd@kernel.org: Rewrite commit text, maintain reference instead of
get again]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 17:14:32 -07:00
Lin Yujun
855ae87a20 clk: imx: scu: fix memleak on platform_device_add() fails
No error handling is performed when platform_device_add()
fails. Add error processing before return, and modified
the return value.

Fixes: 77d8f3068c ("clk: imx: scu: add two cells binding support")
Signed-off-by: Lin Yujun <linyujun809@huawei.com>
Link: https://lore.kernel.org/r/20220914033206.98046-1-linyujun809@huawei.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 17:06:59 -07:00
Lars-Peter Clausen
01874fb2a3 clk: vc5: Use regmap_{set,clear}_bits() where appropriate
regmap_set_bits() and regmap_clear_bits() are variations of
regmap_update_bits() that can be used if all bits of the mask have to be
set to either 1 or 0 respectively.

Update the versaclk driver to use regmap_set_bits() and regmap_clear_bits()
where appropriate. This results in slightly more compact code and also
makes the intention of the code clearer which can help with review.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Link: https://lore.kernel.org/r/20220719094637.844946-2-lars@metafoo.de
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 17:02:45 -07:00
Lars-Peter Clausen
cc3237827a clk: vc5: Check IO access results
The devices of the versaclk clock generator family use an I2C control bus.
IO access on an I2C bus can fail for various reasons.

The driver currently ignores the return value of most IO operations. This
results in silent failure. To avoid this check the return value and in case
of an error abort the operation and propagate the error code to the caller.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Link: https://lore.kernel.org/r/20220719094637.844946-1-lars@metafoo.de
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 17:02:40 -07:00
Fabien Parent
d46adccb79 clk: mediatek: add driver for MT8365 SoC
Add clock drivers for MT8365 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20220822152652.3499972-5-msp@baylibre.com
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 15:08:16 -07:00
Markus Schneider-Pargmann
083cc5e402 clk: mediatek: Export required common code symbols
To make clk-mt8365 compilable as a module there are a few function
symbols missing. This patch adds the required EXPORT_SYMBOL_GPL to the
functions.

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20220822152652.3499972-4-msp@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 15:08:16 -07:00
Markus Schneider-Pargmann
50e68b9904 clk: mediatek: Provide mtk_devm_alloc_clk_data
Provide a helper that replaces the kzalloc with devm_kzalloc so error
handling gets easier.

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20220822152652.3499972-3-msp@baylibre.com
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 15:07:43 -07:00
Andy Shevchenko
d61876a285 clkdev: Simplify devm_clk_hw_register_clkdev() function
Use devm_add_action_or_reset() instead of devres_alloc() and
devres_add(), which works the same. This will simplify the
code. There is no functional changes.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220623115719.52683-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:50:11 -07:00
Andy Shevchenko
07bdf48d3f clkdev: Remove never used devm_clk_release_clkdev()
For the entire history of the devm_clk_release_clkdev() existence
(since 2018) it was never used. Remove it for good.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220623115719.52683-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:50:11 -07:00
Andy Shevchenko
1c8934b480 clk: Remove never used devm_of_clk_del_provider()
For the entire history of the devm_of_clk_del_provider) existence
(since 2017) it was never used. Remove it for good.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220623115719.52683-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:50:10 -07:00
Dom Cobley
1777cb60f7 clk: bcm: rpi: Add support for VEC clock
Platform driver clk-bcm2835 gets an inaccurate clock for VEC (107MHz).
Export VEC clock trough clk-raspberrypi which uses the right PLL to
get an accurate 108MHz.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
[iivanov: Adapted on top of v5.17-rc6]
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Link: https://lore.kernel.org/r/20220829152154.147250-4-iivanov@suse.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:31:36 -07:00
Ivan T. Ivanov
16baa8c1c1 clk: bcm: rpi: Handle pixel clock in firmware
The clk-bcm2835 handling of the pixel clock does not function
correctly when the HDMI power domain is disabled.

The firmware supports it correctly, so add it to the
firmware clock driver.

Acked-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Link: https://lore.kernel.org/r/20220829152154.147250-3-iivanov@suse.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:31:35 -07:00
Ivan T. Ivanov
4c68a345c1 clk: bcm: rpi: Add support HEVC clock
Export clock required for RPiVid video decoder hardware.

Cc: Dom Cobley <popcornmix@gmail.com>
Acked-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Link: https://lore.kernel.org/r/20220829152154.147250-2-iivanov@suse.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:31:35 -07:00
Stefan Wahren
0b919a3728 clk: bcm2835: fix bcm2835_clock_rate_from_divisor declaration
The return value of bcm2835_clock_rate_from_divisor is always unsigned
and also all caller expect this. So fix the declaration accordingly.

Fixes: 41691b8862 ("clk: bcm2835: Add support for programming the audio domain clocks")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/20220904141037.38816-1-stefan.wahren@i2se.com
Reviewed-by: Ivan T. Ivanov <iivanov@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:30:36 -07:00
Ivan T. Ivanov
f690a4d7a8 clk: bcm2835: Round UART input clock up
It was reported that RPi3[1] and RPi Zero 2W boards have issues with
the Bluetooth. It turns out that when switching from initial to
operation speed host and device no longer can talk each other because
host uses incorrect UART baud rate.

The UART driver used in this case is amba-pl011. Original fix, see
below Github link[2], was inside pl011 module, but somehow it didn't
look as the right place to fix. Beside that this original rounding
function is not exactly perfect for all possible clock values. So I
deiced to move the hack to the platform which actually need it.

The UART clock is initialised to be as close to the requested
frequency as possible without exceeding it. Now that there is a
clock manager that returns the actual frequencies, an expected
48MHz clock is reported as 47999625. If the requested baud rate
== requested clock/16, there is no headroom and the slight
reduction in actual clock rate results in failure.

If increasing a clock by less than 0.1% changes it from ..999..
to ..000.., round it up.

[1] https://bugzilla.suse.com/show_bug.cgi?id=1188238
[2] ab3f1b3953

Cc: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/20220912081306.24662-1-iivanov@suse.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:29:42 -07:00
Maxime Ripard
6c5422851d clk: bcm2835: Make peripheral PLLC critical
When testing for a series affecting the VEC, it was discovered that
turning off and on the VEC clock is crashing the system.

It turns out that, when disabling the VEC clock, it's the only child of
the PLLC-per clock which will also get disabled. The source of the crash
is PLLC-per being disabled.

It's likely that some other device might not take a clock reference that
it actually needs, but it's unclear which at this point. Let's make
PLLC-per critical so that we don't have that crash.

Reported-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220926084509.12233-1-maxime@cerno.tech
Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:28:18 -07:00
Serge Semin
c4e05443b6 clk: baikal-t1: Convert to platform device driver
In accordance with the way the MIPS platform is normally design there are
only six clock sources which need to be available on the kernel start in
order to one end up booting correctly:
+ CPU PLL: needed by the r4k and MIPS GIC timer drivers. The former one is
  initialized by the arch code, while the later one is implemented in the
  mips-gic-timer.c driver as the OF-declared timer.
+ PCIe PLL: required as a parental clock source for the APB/timer domains.
+ APB clock: needed in order to access all the SoC CSRs at least for the
  timer OF-declared drivers.
+ APB Timer{0-2} clocks: these are the DW APB timers which drivers
  dw_apb_timer_of.c are implemented as the OF-declared timers.

So as long as the clocks above are available early the kernel will
normally work. Let's convert the Baikal-T1 CCU drivers to the platform
device drivers keeping that in mind.

Generally speaking the conversion isn't that complicated since the driver
infrastructure has been designed as flexible enough for that. First we
need to add a new PLL/Divider clock features flag which indicates the
corresponding clock source as a basic one and that clock sources will be
available on the kernel early boot stages. Second the internal PLL/Divider
descriptors need to be initialized with -EPROBE_DEFER value as the
corresponding clock source is unavailable at the early stages. They will
be allocated and initialized on the Baikal-T1 clock platform driver probe
procedure. Finally the already available PLL/Divider init functions need
to be split up into two ones: init procedure performed in the framework of
the OF-declared clock initialization (of_clk_init()), and the probe
procedure called by the platform devices bus driver. Note the later method
will just continue the system clocks initialization started in the former
one.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20220929225402.9696-9-Sergey.Semin@baikalelectronics.ru
[sboyd@kernel.org: Remove module things because the Kconfig is still
bool]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:20:56 -07:00
Serge Semin
fa6bd541d7 clk: baikal-t1: Add DDR/PCIe directly controlled resets support
Aside with a set of the trigger-like resets Baikal-T1 CCU provides two
additional blocks with directly controlled reset signals. In particular it
concerns DDR full and initial resets and various PCIe sub-domains resets.
Let's add the direct reset assertion/de-assertion of the corresponding
flags support into the Baikal-T1 CCU driver then. It will be required at
least for the PCIe platform driver. Obviously the DDR controller isn't
supposed to be fully reset in the kernel, so the corresponding controls
are added just for the sake of the interface implementation completeness.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20220929225402.9696-8-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:19:41 -07:00
Serge Semin
70fa895488 clk: baikal-t1: Move reset-controls code into a dedicated module
Before adding the directly controlled resets support it's reasonable to
move the existing resets control functionality into a dedicated object for
the sake of the CCU dividers clock driver simplification. After the new
functionality was added clk-ccu-div.c would have got to a mixture of the
weakly dependent clocks and resets methods. Splitting the methods up into
the two objects will make the code easier to read and maintain. It shall
also improve the code scalability (though hopefully we won't need this
part that much in the future).

The reset control functionality is now implemented in the framework of a
single unit since splitting it up doesn't make much sense due to
relatively simple reset operations. The ccu-rst.c has been designed to be
looking like ccu-div.c or ccu-pll.c with two globally available methods
for the sake of the code unification and better code readability.

This commit doesn't provide any change in the CCU reset implementation
semantics. As before the driver will support the trigger-like CCU resets
only, which are responsible for the AXI-bus, APB-bus and SATA-ref blocks
reset. The assert/de-assert-capable reset controls support will be added
in the next commit.

Note the CCU Clock dividers and resets functionality split up was possible
due to not having any side-effects (at least we didn't found ones) of the
regmap-based concurrent access of the common CCU dividers/reset CSRs.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20220929225402.9696-6-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 14:19:33 -07:00