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3 Commits

Author SHA1 Message Date
Matthias Kaehlcke
f70893dcce clk: sunxi-ng: Fix header guard of ccu-sun8i-r.h 
Remove trailing extra underscore in definition of _CCU_SUN8I_R_H

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
 2017-07-27 16:53:47 +02:00
Icenowy Zheng
266061b763 clk: sunxi-ng: fix PRCM CCU CLK_NUMBER value 
The CLK_NUMBER value of PRCM CCU is wrongly set to (CLK_APB0_PWD + 1),
which prevented the IR mod clock from being set up.

Change it to (CLK_IR + 1) in order to correctly get IR mod set up.

Fixes: cdb8b80b60 ("clk: sunxi-ng: add support for PRCM CCUs")

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
 2017-04-10 09:04:33 +02:00
Icenowy Zheng
cdb8b80b60 clk: sunxi-ng: add support for PRCM CCUs 
SoCs after A31 has a clock controller module in the PRCM part.

Support the clock controller module on H3/5 and A64 now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
 2017-04-04 17:43:52 +02:00