These patches enables the gated clocks on the A10s, A20 and A31 DTSI.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJSGxleAAoJEBx+YmzsjxAgMHIP/i1MjO0IB/PneVrKCP36PlAP
b3ST2UVDy9IBtgGHoqH+Ql12FsRZkrTM6QvPVkjlIQAHaHfrZxQYlRoHou+MFUIU
3WixWYsjJmyUW1jLrXlW+TubCLJ5V4pHxZpU/79qFKiAg+F57vm3Zj/+gczRZp0+
6bezcVNZ599BRcwfrjg33yMNo7kHg78Mib1yTnj9Tdak+aqomzW2bUWmE/uprMQy
GOwkNVxcVVXxul23bjBzj2Cxxf9Acbtfhm4+nr449opDgHiFY8GRx6moDNp2/Nbe
VygG48jw3Dt+yM++xFFIJwHTHOWdrkFioqYL4cWYMWqLeJhJzgDp6zdxvxLvC3PC
6LACex4ZskxWVsKu2OLPSIBJyqpFLmOSKoBMML3e9jHcJ2ykbpE1oXZcBiJa/0pV
TTldJnbgpdT8ZgB0oOqWJ6xw8jaKSfUwbS8LwtIaiSpXsbCqT5okgApuhgyiD1qh
h+c4ZBH1i1ytbrNta7Ce8zkcx73pfwPr0queXdEgy24zjfYCWB9oE9yXcEAEbRAT
FeftFzaNO4LI8asHOSL0FsjJJ3/WjTL25wWVnfwYoulBG3AcQipu9m4I+SGEAtP6
ZmqaA99yRTO3XSvB4/YHyT21Ar3BICAhgM/K9DOx2VKeRFwn8Fct9c4aZBs93Z0O
QpH7kElElwV2SIEV0mIy
=MtGM
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-3.12-4' of https://github.com/mripard/linux into late/all
From Maxime Ripard:
Allwinner DT changes for 3.12, take 3 and 4
These patches add support for:
- The cubieboard2 board
- The pinctrl driver that got merged for the A20 and A31
- The associated muxing for the A20 and A31 boards already supported
- Enables the gated clocks on the A10s, A20 and A31 DTSI.
* tag 'sunxi-dt-for-3.12-4' of https://github.com/mripard/linux:
ARM: sun7i: Enable the A20 clocks in the DTSI
ARM: sun6i: Enable clock support in the DTSI
ARM: sun5i: dt: Use the A10s gates in the DTSI
ARM: sun7i: Add Cubieboard2 Device Tree
ARM: sun7i: a20-olinuxino: Enable the user LED
ARM: sun7i: a20-olinuxino: Enable UARTs muxing
ARM: sun7i: DT: Add UART muxing options to the DTSI
ARM: sun7i: Add the PIO controller node to the DTSI
ARM: sun6i: colombus: Add uart0 muxing
ARM: sun6i: Add UART0 muxing options
ARM: sunxi: dt: Add PIO controller to A31 DTSI
Signed-off-by: Olof Johansson <olof@lixom.net>
- addition of the Nand Flash Controller (NFC) in DT
for sama5d3 SoC. This NFC will enhance the traditional
Nand Flash handling (SMC + PMECC).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJSGx/LAAoJEAf03oE53VmQCH8H/jUaXqdmLk6wNFamHbFtWaib
AuIIJL65NeOHCIgVRMIu+Cjxc4XqPeqjHvttNWJ3xaqLMWt9s7d0L+65WsQs9kEg
yIJ3KOWMOs4+/uoaOPZ9lG+luv0kFQ5GaY7w9PRuFOZ+mtjATzZxOJ3ARfpbvlxA
zxiqqKjlK7CuyjDjO6prfABVUTn+JfKlHcYdRvK03TISAe87nq2eUeZr08/Dx1OT
iohSvHPQ/xwbVvHxfB69Oc95h756n0Y+8XJ2S6U/mM29YDiyLznBmMxkXZXDX4fw
TGxRKuV/Gt4vM0Bbq5E0aJA0/MQQu6q3HbTtY20Io1JHA6S5yVSPXGAcdi+uqys=
=V30n
-----END PGP SIGNATURE-----
Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into late/all
From Nicolas Ferre:
AT91 DT changes for 3.12, take 2
- addition of the Nand Flash Controller (NFC) in DT
for sama5d3 SoC. This NFC will enhance the traditional
Nand Flash handling (SMC + PMECC).
* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
ARM: at91/dt: sama5d3xek: reduce the ROM code mapping for pmecc lookup table
ARM: at91/dt: sama5d3xek: Enable NFC support in dts
ARM: at91/dt: sama5d3xek: remove the useless NFC dt parameters
ARM: at91/dt: sam9x5ek: add sound configuration
ARM: at91/dt: sam9x5ek: enable SSC
ARM: at91/dt: sam9x5ek: add WM8731 codec
ARM: at91/dt: sam9x5: add SSC DMA parameters
ARM: at91/dt: add at91rm9200 PQFP package version
ARM: at91: at91rm9200: set default mmc0 pinctrl-names
ARM: at91: at91sam9n12: correct pin number of gpio-key
ARM: at91: at91sam9n12: add qt1070 support
ARM: at91: at91sam9n12: add pinctrl of TWI
ARM: at91: Add PMU support for sama5d3
ARM: at91: at91sam9260: add missing pinctrl-names on mmc
Now that the clock driver knows about the available clocks found on the
A20, we can build up the clock tree from the device tree.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that the clock driver has support for the A31 clocks, we can add
them to the DTSI and start using them in the relevant hardware blocks.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10s has only a subset of the A10 gates. Now that the clock driver
has support for this gates set, switch to it in the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Add ADC device tree node for exynos5420 and exynos5250
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Moves the RTC DT node's "status" property from exynos5250 board
(arndale & snow) dts files to exynos5250.dtsi, since the bindings
in exynos5250.dtsi depicts the RTC h/w completely.
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fixes the RTC DT node name for Exynos5250 as per the DT node naming
convention.
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This fixes a regression exposed during the merge window by commit
9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT"; namely that
USB VBUS doesn't get turned on, so USB devices are not detected. This
affects the internal USB port on TrimSlice (i.e. the USB->SATA bridge, to
which the SSD is connected) and the external port(s) on Seaboard/
Springbank and Whistler.
The Tegra DT as written in v3.11 allows two paths to enable USB VBUS:
1) Via the legacy DT binding for the USB controller; it can directly
acquire a VBUS GPIO and activate it.
2) Via a regulator for VBUS, which is referenced by the new DT binding
for the USB controller.
Those two methods both use the same GPIO, and hence whichever of the
USB controller and regulator gets probed first ends up owning the GPIO.
In practice, the USB driver only supports path (1) above, since the
patches to support the new USB binding are not present until v3.12:-(
In practice, the regulator ends up being probed first and owning the
GPIO. Since nothing enables the regulator (the USB driver code is not
yet present), the regulator ends up being turned off. This originally
caused no problem, because the polarity in the regulator definition was
incorrect, so attempting to turn off the regulator actually turned it
on, and everything worked:-(
However, when testing the new USB driver code in v3.12, I noticed the
incorrect polarity and fixed it in commit 9f310de "ARM: tegra: fix VBUS
regulator GPIO polarity in DT". In the context of v3.11, this patch then
caused the USB VBUS to actually turn off, which broke USB ports with VBUS
control. I got this patch included in v3.11-rc1 since it fixed a bug in
device tree (incorrect polarity specification), and hence was suitable to
be included early in the rc series. I evidently did not test the patch at
all, or correctly, in the context of v3.11, and hence did not notice the
issue that I have explained above:-(
Fix this by making the USB VBUS regulators always enabled. This way, if
the regulator owns the GPIO, it will always be turned on, even if there
is no USB driver code to request the regulator be turned on. Even
ignoring this bug, this is a reasonable way to configure the HW anyway.
If this patch is applied to v3.11, it will cause a couple pretty trivial
conflicts in tegra20-{trimslice,seaboard}.dts when creating v3.12, since
the context right above the added lines changed in patches destined for
v3.12.
Reported-by: Kyle McMartin <kmcmarti@redhat.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The Cubieboard2 is the successor of the first Cubieboard, and shares the
same hardware, except that the Allwinner A10 found initially has been
replaced by an Allwinner A20.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20-olinuxino Micro has a LED connected to the PH2 pin. Use the
gpio-led driver to enable the control over this LED.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Instead of relying on the bootloader to mux the UART pins properly, do
it on our own and register the rightful pins for the A20-olinuxino in
the DT using pinctrl.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The UARTs on the A20 can be muxed to several pins. Add a few options to
the DTSI so that we can start using them in the boards' DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The PIO controller is responsible for the GPIO/muxing/external
interrupts handling. Now that we have support for the A20 pin set in the
pinctrl driver, we can start using it in the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A31 has a different set of pins than the one found on the A10 and
A13. Now that we have support for the A31 pin set in the pinctrl driver,
we can enable it in the DTSI with its own compatible.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The sam9x5ek board has 2 jacks:
headphone wired on RHPOUT/LHPOUT of the wm8731
line in wired on LLINEIN/RLINEIN of the wm8731
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Enable the SSC needed for the WM8731 codec
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The WM8731 codec on sam9x5ek board is on i2c, address 1A
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The PQFP version have only 3 gpio banks (A, B & C).
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: correct typo in "status" property]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Correct pin number of gpio-key for at91sam9n12ek board.
The pioB4 is connect to LED, the pioB3 use as gpio-key.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM Performance Monitor Units are available on the sama5d3, add the support in
the dtsi.
Tested with perf and oprofile on the sama5d31ek.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
pinctrl-names was missing causing mmc pinctrl to never be requested.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: added a commit message taken from Ludovic]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The Olimex A20-Olinuxino is an open-hardware board based on the
Allwinner A20 SoC, with most of the pins exported on headers, a 10/100M
ethernet port, SATA, SD and uSD slots, etc.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Allwinner A20 SoC is based on 2 Cortex A7, an ARM Mali GPU, and is
built to be pin-compatible with the older Allwinner A10.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds EHCI and OHCI host device nodes for Exynos4.
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This adds device-tree bindings for the audio subsystem clock controller
on Exynos 5420.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/57712
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch corrects the /include to #include on exynos5420
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The patch adds the MFC clock entry for the 5250 SoC.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Removes the unused sclk_mfc from exynos4 dtsi file.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
While the Linux driver stack is capable of figuring this out for itself
document the fact that we really do use the internal PHY even with the
directly wired hub on the board to save anyone else having to work this
out for themselves.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The Arndale has a SMSC USB3503 connected in hardware only mode like a PHY,
support it using the usb-nop-xceiv binding.
Note that due to a regrettable decision to use a regulator to represent
the reset signal this uses a fixed voltage regulator to do that, there
is a plan to use the reset controller binding once that is merged so it
does not seem worthwhile to fix the usb-nop-xceiv driver at this point.
Signed-off-by: Mark Brown <broonie@linaro.org>
Tested-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
OrigenQuad board boots with secure firmware support. Enable support for
reading smc commands.
The binding has been updated as per the documentation provided in
Documentation/devicetree/bindings/arm/samsung-boards.txt.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add pin state information for DP HPD support that requires pin configuration
support using pinctrl interface.
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Moves the properties of DP controller to exynos5.dtsi which are common
across exynos5 SoCs like Exynos5250 and Exynos5420.
The PHY DP Node is based on Jingoo Han's <jg1.han@samsung.com> patch
at https://patchwork.linuxtv.org/patch/19189/
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adds FIMD DT node to exynos5420 based SMDK. Also adds display-timimg
information node.
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Moves the properties of FIMD DT node which are common across Exynos5 based
SoCs like Exynos5250 and Exynos5420 to exynos5.dtsi
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
