Commit Graph

4 Commits

Author SHA1 Message Date
Nicolin Chen
73a2cd9193 ASoC: fsl_esai: Add indentation for binding doc to increase readability
This patch simply adds indentations for DT binding doc to increase readability
without changing any contents.

Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-20 12:20:20 +01:00
Fabio Estevam
5ea5570579 ASoC: fsl_esai doc: Add "fsl,vf610-esai" as compatible string
Since commit b21cc2f5fd ("ASoC: esai: Add VF610+ compatibles support.")
the fsl_esai driver also accepts  the "fsl,vf610-esai" compatible string.

Update the documentation accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-04 19:08:10 +01:00
Xiubo Li
eaba603fc7 ASoC: fsl-esai: big-endian support
For most platforms, the CPU and ESAI device is in the same endianess
mode. While for the LS1 platform, the CPU is in LE mode and the ESAI
is in BE mode.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-12 15:32:22 +00:00
Nicolin Chen
43d24e76b6 ASoC: fsl_esai: Add ESAI CPU DAI driver
This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
controller that supports:

 - 12 channels playback and 8 channels record.
   [ Some of the inner transmitters and receivers are sharing same group of
     pins. So the maxmium 12 output or 8 input channels are only valid if
     there is no pin conflict occurring to it. ]

 - Independent (asynchronous mode) or shared (synchronous mode) transmit and
   receive sections with separate or shared internal/external clocks and frame
   syncs, operating in Master or Slave mode.
   [ Current ALSA seems not to allow CPU DAI drivers to configure DAI format
     separately for PLAYBACK and CAPTURE. So this first version only supports
     the case that uses the same DAI format for both directions. ]

 - Various DAI formats: I2S, Left-Justified, Right-Justified, DSP-A and DSP-B.

 - Programmable word length (8, 16, 20 or 24bits)

 - Flexible selection between system clock or external oscillator as input
   clock source, programmable internal clock divider and frame sync generation.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-10 12:52:15 +00:00